Lateral electric field liquid crystal display device suitable for improvement of aperture ratio

ABSTRACT

In an active matrix liquid crystal display device that is capable of realizing viewing angles comparable to those of Brawn tubes and is for controlling display by electric fields extending substantially parallel to a substrate surface, there is provided an active matrix liquid crystal display device which is bright and low in power dissipation.  
     Constitute a pixel electrode and its counter electrode capable of application of an electric field that is nearly parallel to the substrate surface, and also constitute either the pixel electrode or the counter electrode from a transparent electrode while simultaneously arranging the alignment state of liquid crystals and the polarization axis of a polarizer plate in such a way as to perform dark displaying upon application of no electric fields thereto. It is possible to provide an active matrix liquid crystal display device of the lateral electric field scheme which has wide view-angle characteristics and excellent in contrast ratio and aperture ratio while improving the maximum transmissivity.

[TECHNICAL FIELD]

[0001] The present invention relates generally to active-matrix liquidcrystal display devices and, more particularly, to liquid crystaldisplay devices of the lateral electric field scheme having wideview-angle characteristics suitable for improvement of the apertureratio.

[BACKGROUND ART]

[0002] Liquid crystal display devices of the active matrix type whichemploy active elements typically including thin-film transistors (TFTs)are becoming more important in the manufacture of display terminals foruse with OA equipment or else in view of the fact that these offerenhanced display abilities with superior image quality comparable toBrawn tubes in addition to flatness and light-weight features thereof.Such liquid crystal display devices of this type are generallycategorized into the two which follow.

[0003] One is the scheme for letting a liquid crystal material besandwiched between two substrates with more than one transparentelectrode arranged thereon for permitting operation using a voltage asapplied to such transparent electrode while modulating rays of lightfalling onto the liquid crystal after penetration of the transparentelectrode to thereby perform displaying—all the currently availableproducts are designed to employ this scheme.

[0004] The other one is a scheme for letting the liquid crystal operateby an electric field that is substantially parallel to a substratesurface between two electrodes arranged on the same substrate whilemodulating light incident on the liquid crystal from a gap space betweentwo electrodes to thereby perform displaying, which scheme has itscharacteristic that the viewing angle is extremely wide, and thus is oneexpectable technology with regard to active-matrix liquid crystaldisplay devices, which is called the “lateral electric field scheme” oralternatively “in-plane switching” scheme.

[0005] Some features of the latter scheme have been disclosed inDomestically Published Japanese PCT Application No. 5-505247, PublishedJapanese Patent Application No. 63-21907 (JP-A-63-21907), andJP-A-6-160878.

[0006] However, the said latter prior art scheme is such that since anopaque metal electrode is arranged into a comb-like shape, the resultingratio of an opening region permitting light to pass therethrough(aperture ratio) is significantly low, which results in thatactive-matrix liquid crystal display devices of the latter prior artscheme are encountered with problems that the display screen is dark oralternatively a bright backlight with great power dissipation must beused in order to brighten the display screen resulting in an increase inpower dissipation of the devices.

[0007] Another problem associated with the latter prior art scheme isthat the use of a metal electrode leads to an increase in reflectivityat the electrode, which in turn creates a problem that a face or thelike is seen like a ghost image on the screen due to reflection at theelectrode, reducing recognizability.

[0008] The present invention is to solve the problems above, and anobjective of the present invention is to provide an active-matrix liquidcrystal display device employing said latter display scheme capable ofrealizing a viewing angle equivalent to that of Brawn tubes, wherein theactive-matrix liquid crystal display device is bright due to highaperture ratio and yet low in power dissipation and in reflection forincreased display ability.

[SUMMARY OF THE INVENTION]

[0009] To attain the foregoing object, the present invention offers, asits first arrangement, certain features which follow: at least one of apixel electrode and a counter electrode is a transparent electrode; thenormally-black mode is established for providing dark display in theabsence of an electric field as applied thereto; the initial alignmentstate of said twistable liquid crystal layer is the homogeneousalignment state upon application of no electric fields; liquid crystalmolecules between said electrodes and those on the electrodes uponapplication of an electric field rotate controllably in a directionsubstantially parallel to the substrate surface; the maximum value ofthe optical transmissivity of a liquid crystal display panel is 4.0% orgreater; and, the view-angle range of the contrast ratio of 10 to 1 orgreater is within the range of all-directional coverage as tilted by 40degrees or more from the vertical direction relative to the displayplane.

[0010] As a second arrangement, it is featured in that at least one ofthe pixel electrode and counter electrode is a transparent electrode,that the normally-black mode is set for providing dark display uponapplication of no electric fields, that the initial alignment state ofthe twistable liquid crystal layer is the homogeneous state uponapplication of no electric fields, and that the twist elastic modulus isnot greater than 10×10⁻¹² N (Newton).

[0011] As a third arrangement, it is featured in that at least one ofthe pixel electrode and counter electrode is a transparent electrode,that the normally-black mode is set for providing dark display uponapplication of no electric fields, that the initial alignment state ofthe twistable liquid crystal layer is the homogeneous state uponapplication of no electric fields, that the initial pretilt angle ofthose liquid crystal molecules at the upper and lower interfaces of theliquid crystal layer is not more than 10 degrees, and that the initialtilt state of liquid crystal molecules within the liquid crystal layerare in the spray state.

[0012] As a fourth arrangement, it is featured in that at least one ofthe pixel electrode and counter electrode is a transparent electrode,that the normally black mode is set for providing dark display uponapplication of no electric fields, that the initial alignment state ofthe twistable liquid crystal layer is the homogeneous state uponapplication of no electric fields, and that the average tilt angle ofliquid crystal molecules of the liquid crystal layer on the transparentelectrode is less than 45 degrees even when applying an electric fieldthereto.

[0013] As a fifth arrangement, in any one of the first to fourtharrangements, a double structure of a transparent electrode and anopaque electrode is employed for at least either the pixel electrode orthe counter electrode.

[0014] As a sixth arrangement, in any one of the first to fourtharrangements, a structure is used in which neighboring ones ofcontra-voltage signal lines are connected by a counter electrode withina pixel via more than one through-hole.

[0015] As a seventh arrangement, in any one of the first to fourtharrangements, it is featured by further having a protective film for usein covering or coating active matrix elements, and in that at least oneof said pixel electrode or said counter electrode is formed overlyingsaid protective film while permitting electrical connection via morethan one through-hole as formed in said protective film to either activematrix elements or contra-voltage signal lines.

[0016] As an eighth arrangement, in any one of the first to fourtharrangements, the counter electrode is made of a transparent electrode,and further make use of a structure having an optical shield patternbetween a counter electrode and an image signal line.

[0017] As a ninth arrangement, in any one of the first, second, third,fourth and fifth arrangements, the contra-voltage signal line forelectrical connection between counter electrodes is a metal.

[0018] As a tenth arrangement, in any one of the first to fourtharrangements, more than three counter electrodes are formed, two ofwhich are formed adjacent to image signal lines, wherein the counterelectrodes formed adjacent to the image signal lines are opaque.

[0019] As an eleventh arrangement, in any one of the first to fourtharrangements, a transparent conductive film for use as the transparentelectrode is indium-tin-oxide (ITO).

[0020] As a twelfth arrangement, in the ninth arrangement, thecontra-voltage signal line is Cr, Ta, Ti, Mo, W, Al, or an alloythereof, or alternatively a clad structure with such materialslaminated.

[0021] As a thirteenth arrangement, in the ninth arrangement, thecontra-voltage signal line is a clad structure with a transparentconductive film such as indium-tin-oxide (ITO) or the like beinglaminated on Cr, Ta, Ti, Mo, W, Al, or an alloy thereof.

[0022] As a fourteenth arrangement, in any one of the first to fourtharrangements, the initial twist angle of said liquid crystal layer issubstantially zero, wherein the initial alignment angle is greater thanor equal to 45 degrees and yet less than 90 degrees when the dielectricanisotropy Δε of the liquid crystal material is positive in polaritywhereas it goes beyond zero degree and stays less than 45 degrees if thedielectric anisotropy Δε is negative.

[0023] As a first manufacturing method, it is featured by forming atleast any one of a scan signal line end section, an image signal lineend section or the uppermost layer of a counter electrode end sectionand at least one of a pixel electrode or counter electrode by atransparent conductive layer, and further forming them at the sameprocess step.

[0024] An operation of the present invention will be set forth below.

[0025] First of all, an operation of the first arrangement is asfollows: Making transparent at least one of the pixel electrode or itscounter electrode enables the light penetrating such portion to devoteto improvement of the maximum optical permeability or transmissivityduring bright (white) displaying to thereby make it possible to performbrighter displaying than in cases where the electrodes are opaque sothat the liquid crystal display panel's transmissivity can be improvedin value of maximum transmissivity from 3.0 to 3.8%, in the case ofemploying opaque electrodes in the latter prior art scheme, up to 4.0%or greater in the present invention. More specifically, assuming thatthe brightness or luminance of backlight incident light is at 3,000cd/m², the maximum brightness value of bright-display luminance canattain 120 cd/m² or greater.

[0026] Further, as the liquid crystal molecules retain their initialhomogeneous alignment state upon application of no voltages, when thelayout of polarizer plates is designed to establish dark (black) displayin such state (in normally-black mode), no rays of light pass throughsuch portion even where the electrodes are made transparent to therebymake it possible to achieve dark display of good quality, thus improvingthe contrast.

[0027] On the contrary, if the normally-white mode is set then darkdisplaying must be done upon application of a voltage, which results inincapability to completely block the light at portions overlying theelectrodes upon applying of a voltage, which in turn makes it impossibleto provide dark displaying with good quality due to the fact that thetransmitted light of such portions pushes up the transmissivity of darkdisplay. For this reason, any sufficient contrast ratio cannot beaccomplished.

[0028] Furthermore, wide viewing angle characteristics can be obtainedbecause those liquid crystal display molecules between said electrodesand over the electrodes upon application of a voltage thereto behave tocontrollably rotate in a direction parallel to substrate surfaces.

[0029] Accordingly, wide view-angle characteristics can be obtained inwhich the view-angle range of contrast ratios of 10 to 1 or more fallswithin an all-directional range with inclination of 40 degrees orgreater from the vertical direction with respect to the display plane.

[0030] In addition, an operation of the second arrangement is asfollows. As the twist elastic modulus of a twistable liquid crystallayer is less than or equal to 10×10⁻¹² N (Newton) when applying avoltage between the pixel electrode and counter electrode, the angle αof rotation from the initial alignment direction increases on or over atransparent conductive film letting the on-electrode transmissivitycomplementally interact with the transmissivity between electrodes tosubstantially improve the aperture ratio. It is preferable that thistwist elastic modulus K2 be smaller.

[0031] In addition, an operation of the third arrangement is as follows.In view of the fact that the initial pretilt angle of liquid crystalmolecules at the upper and lower interfaces of a liquid crystal layer isless than or equal to 10 degrees while the initial tilt state of liquidcrystal molecules inside of the liquid crystal layer is a spray state,the tilt angle of liquid crystal molecules at the center of the liquidcrystal layer becomes nearly zero degrees to thereby enable the liquidcrystal layer contributing to displaying to decrease in average tiltangle; thus, even upon application of a voltage, it becomes possible toestablish low tilt angles of those liquid crystal molecules betweenelectrodes and over transparent electrodes, which in turn makes itpossible to realize both aperture ratio improvement and wide viewingangles.

[0032] In addition, an operation of the fourth arrangement is that bothaperture ratio improvement and wide viewing angles can be realized dueto the fact that the average tilt angle of the liquid crystal layer'sliquid crystal molecules on or over the transparent electrode staysbelow 45 degrees even when applying a voltage thereto.

[0033] Further, an operation of the fifth arrangement is that the use ofa double or duplex structure of a transparent electrode and opaque metalelectrode for either the pixel electrode or the counter electrode makesit possible to greatly prevent shortcircuiting defects at thiselectrode, which will be advantageous for achievement of large screens.

[0034] Further, an operation of the sixth arrangement is that the use ofa structure for letting neighboring contra-voltage signal lines beconnected by a counter electrode within a pixel via more than onethrough-hole permits respective contra-voltage signal lines to beelectrically connected together in a net-mesh-like pattern, which makesit possible to reduce the resistivity of such contra-voltage signallines, wherein serious defects will no longer take place even uponoccurrence of opencircuit failures.

[0035] Further, an operation of the seventh arrangement lies in anability to let the protective film suppress reduction of an electricfield acting on liquid crystal molecules, which makes it possible tolower a drive voltage(s).

[0036] Further, an operation of the eighth arrangement is that theaperture ratio is improved by use of a structure with the counterelectrode made of a transparent electrode and with an optical shieldpattern provided between the counter electrode and its associative imagesignal line(s).

[0037] Further, an operation of the ninth arrangement is as follows:Lowering the resistivity of contra-voltage signal lines makes itpossible to smoothen transmission of a voltage between counterelectrodes thus reducing distortion of the voltage, which in turnenables suppression of cross-talk in the horizontal direction.

[0038] Further, an operation of the tenth arrangement is that makingopaque the counter electrode neighboring upon image signal linessuppress crosstalk associated with image signals. The reason for this isset forth below.

[0039] Forming a transparent counter electrode in close proximity to animage signal line forces an electric field (electric flux lines) fromthe image signal line to be absorbed by the counter electrode resultingin the electric field from the image signal line hardly affecting anelectric field between the pixel electrode and counter electrode tothereby extremely suppress generation of crosstalk associated with imagesignals—in particular, crosstalk in the up/down direction of substratesconcerned. However, the behavior of liquid crystal molecules on or overthe counter electrode neighboring upon the image signal line is instabledue to variation of image signals; if the counter electrode thatneighbors the image signal line is made transparent then crosstalk isobserved due to transmitted light at such electrode portion.Accordingly, letting the counter electrode adjacent to the image signalline be opaque makes it possible to suppress crosstalk associated withimage signals.

[0040] Further, an operation of the eleventh arrangement is that thetransparent conductive film is indium-tin-oxide (ITO), which is suitablefor improvement of the optical transmissivity.

[0041] Further, an operation of the twelfth and thirteenth arrangementsis that as the contra-voltage signal line is a laminated clad structure,the resistance value decreases enabling reduction of opencircuitdefects.

[0042] Further, an operation of the fourteenth arrangement is thatbecause the liquid crystal layer's initial twitt angle is nearly zerowhile the initial alignment angle is greater than or equal to 45° C. andyet less than 90° C. if the dielectric anisotropy Δε is positive inpolarity and is above 0° and yet less than or equal to 45° if thedielectric anisotropy Δε is negative, it is possible to improve thecontrast by suppressing domain and optimizing the range of a maximalapplication voltage while at the same time enabling optimization of theresponse speed.

[0043] In addition, an operation of the first manufacturing method is toenable fabrication of pixel electrodes and counter electrodes usingtransparent conductive films without increasing the required number ofprocess steps, by simultaneously forming both the transparent conductivelayer of a scan signal line terminate end portion, image signal lineend, or the counter electrode end's uppermost-layer and the transparentconductive film of the pixel electrode or counter electrode.

[0044] It should be noted that although the liquid crystal displaydevice of the present invention is designed so that at least one of thepixel electrode and the counter electrode is formed of a transparentconductive film, a difference in configuration from a liquid crystaldisplay device as recited in, for example, Richard A. Soref, Proceedingsof the IEEE, December issue, 1974 at pp. 1710-1711 (referred to as“Reference 1” hereinafter) is as follows.

[0045] In Reference 1, a comb-shaped electrode corresponding to a pixelelectrode and counter electrode is constituted from a transparentconductive film.

[0046] However, when forming the initial alignment state of liquidcrystal molecules, SiO (silicon mono-oxide) is orthorhombicallydeposited at about 85 degree to form intentionally an extremely highpretilt angles at liquid crystal molecules in the interface between eachelectrode and the liquid crystal layer. For this reason, as shown inFIG. 1(b) of Reference 1, applying a voltage between comb-shapedelectrodes from the homogeneous alignment with 90-degree twisting in theinitial alignment state results in formation, as the realignment state,of a homogeneous alignment state that is substantially parallel tosubstrate surfaces in a region between the electrodes and of ahomeotropic alignment state that is perpendicular to substrate surfacesin region on or above the electrodes.

[0047] However, with this arrangement, there was a drawback whichfollows: Although complementary interaction of the two kinds ofliquid-crystal molecule realignment states with an increase in electricfield might result in achievability of brighter display, the resultantviewing angle characteristic becomes narrower due to a need to averagelyincrease the tilt angle of liquid crystal molecules.

[0048] On the contrary, with the liquid crystal display device of thelateral electric field scheme in accordance with the present invention,a specific configuration is employed wherein even when applying avoltage between the pixel electrode and counter electrode in order toobtain wide view-angle characteristic and good aperture ratio, thoserealigning portions of liquid crystal molecules contributing to adisplay image are forced to retain the homogeneous alignment state thatmaximally parallels substrate surfaces while simultaneously letting, onor over electrodes of a transparent conductive film, the on-electrodetransmissivity complementarily interact with the interelectrodetransmissivity in a way corresponding to the angle α of rotation fromthe initial alignment direction resulting in substantive improvement ofthe aperture ratio.

[0049] It should be noted that in the description, the term “homogeneousalignment state” refers to a state in which the liquid crystal moleculeswithin a liquid crystal layer have a tilt (rise-up) angle lying inmaximally parallel to either the substrate surface or the interface ofsuch liquid crystal layer—more practically, a specific alignment statein which the tilt angle from either the substrate surface or the liquidcrystal layer's interface stays below 45 degrees. Accordingly, the“homeotropic alignment state” is defined as a case in which the tiltangle from either the substrate surface or the liquid crystal layer'sinterface exceeds 45 degrees.

[0050] See FIG. FIG. 41A, which shows an example of a voltage potentialdistribution within a liquid crystal layer in an electrode arrangementfor creation of an electric field extending nearly parallel to thesubstrate surface.

[0051] Solid lines in the drawing designate equal-potential lines,wherein an electric-field vector is given in a direction perpendicularto such equal-potential lines. While the electric field vector E permitsproduction of only components Ey extending at right angles to thesubstrate surface on the electrode center, those components Ex extendinghorizontally relative to the substrate surface also take place in theremaining part other than the center. In a region in which suchhorizontal components—i.e. lateral electric field components—Ex arebeing generated, liquid crystal molecules between the electrodes behaveto rotate through a rotation angle α from the initial alignmentdirection RDR in the direction of the lateral electric field Ex as shownin FIGS. 41B and 41C.

[0052] On the other hand, on-electrode liquid crystal molecules behaveto rotate with rotation of the interelectrode liquid crystal moleculesin the presence of molecular field. Accordingly, although any lateralelectric field is not being applied to central on-electrode liquidcrystal molecules, these attempt to rotate due to the molecular field inthe same direction as that of their outlying liquid crystal molecules.In other words, the rotation angle α is large between the electrodes,decreases at locations on or above the electrodes, and becomes maximalover the electrode center portion.

[0053] A result of simulating this manner is shown in FIGS. 42A-C.

[0054] Note here that the simulation in this example was carried outusing an exemplary arrangement in which the liquid crystal molecules'initial homogeneous alignment state is designed so that the liquidcrystal layer's initial twist angle is substantially zero whereas aninitial alignment angle defined between the initial alignment directionRDR and the applied electric field Ex is set at φLC=75 degrees, whileletting the initial pretilt angle of certain liquid crystal moleculesnear or around the liquid crystal layer's upper and lower interfaces beset at zero degrees, and further employing a Cross Nicol layout thatlets the transmission axis of one of polarizer plates be identical tosaid initial alignment direction RDR with the transmission axis of theother polarizer plate being at right angles thereby performingdisplaying in a double refraction mode.

[0055] The optical transmissivity T/T₀ at this time may be representedby the following equation:

T/T ₀=sin²(2αeff)·sin²(πdeff·Δn/λ) . . .   (1)

[0056] Here, αeff is the angle defined between the liquid crystallayer's effective light axis and the polarized-light transmissionaxis—in this example, this is the net value of the liquid crystalmolecule rotation angle α in the direction along the thickness of theliquid crystal layer, which is a “virtual” value that is treatable asthe average value under an assumption that the rotation is uniform.

[0057] Additionally, deff is the effective thickness of a liquid crystallayer having double-refractivity, Δn is the refractive anisotropy, and λis the wavelength of light.

[0058] In Equation (1), at the time of applied electric field Ex, thevalue of αeff increases with an increase in intensity of it, and becomesmaximal at the time of 45 degrees.

[0059] Furthermore, in the simulation of this example, the liquidcrystal layer's retardation Δn·deff is set at a selected value that ishalf of the wavelength λ of light for achievement of the doublerefraction zero-order mode while setting the dielectric anisotropy Δε inpositive polarity.

[0060]FIG. 42A is a characteristic diagram showing the state ofequal-potential lines in the case of applying to a transparent ITOelectrode a voltage at which bright display near the maximum isobtainable, wherein the vertical axis represents the thickness (4.0 μmthick) of a liquid crystal layer whereas the transverse axis indicates arelative electrode position relationship. Note that values in thisdrawing are indicative of the voltage potential strength standardized.

[0061] Also see FIG. 42B and FIG. 42C, which show the rotation angle αand tilt (rise-up) angle of liquid crystal molecules within a liquidcrystal layer upon application of lateral electric field components Exas formed from this state of equal-potential lines.

[0062] As shown in FIG. 42C, the on-electrode liquid crystal moleculeshardly rise up even when applying a voltage thereto: In this example,the tilt angle stays below 8° in the entire direction along thethickness of the liquid crystal layer. Further, as shown in FIG. 42B,those liquid crystal molecules on or over electrodes also have rotatedabout 15 to 35°.

[0063] It is noted that the sign of the tilt angle shown in FIG. 42C isdetermined so that the rightward rise-up in the drawing is positivewhereas leftward riseup is negative for purposes of convenience inillustration and discussion herein. Therefore, with the scheme of thepresent invention, it becomes possible to allow the liquid crystalmolecules to vary in rotation angle α even on or over the electrodes tothereby change the transmissivity.

[0064] The one that is most pertinent to this operation is the liquidcrystal's twist elastic modulus K2, which is preferably as small aspossible in view of the fact that as this modulus K2 gets smaller,liquid crystal molecules on or over electrodes receive influence of theinterelectrode liquid crystal molecules to rotate approaching therotation angle α of such interelectrode liquid crystal molecules.

[0065] Referring to FIG. 41D, there is shown a model of a distributionof the on-electrode transmissivity and the interelectrode transmissivityin case where the twist elastic modulus K2 is set at about 10×10⁻¹² N(Newton).

[0066] In case the electrodes concerned are transparent, theon-electrode liquid crystal molecules' realignment operation discussedabove allows 5 to 30% of the average transmissivity of transmissivitiesat part “A” between electrodes to become the average-valuetransmissivity of transmissivities at part “B” on or over theelectrodes.

[0067] In addition, as will be described later, it has been found thatif the twist elastic modulus K2 is less than or equal to 2.0×10⁻¹² N(Newton) then more than 50% of the average transmissivity oftransmissivities at the part “A” between the electrodes becomes theaverage-value transmissivity of transmissivities at the part B on orover the electrodes. Therefore, the average transmissivity over theentire part is raised up to become the average-value transmissivity ofthe transmissivities at the A+B portions.

[0068] To make long story short, when compared to the ones which havebeen traditionally comprised of a metal layer that permits no light raysto pass through, it becomes possible to substantially improve theaperture ratio per pixel.

[0069] With the simulation of this example, calculation is done with theinitial pretilt angle being set at zero degrees; however, in actualimplementation, it will be required that the initial pretilt angle nearor around the interface(s) of the liquid crystal layer with itsassociative alignment film(s) be set by rubbing treatment atapproximately 10 degrees or less; preferably, it is set at 6 degrees orbelow. Additionally, in an embodiment to be later described, it is setat about 5 degrees.

[0070] With the initial pretilt angle set falling within such range, itis possible to control the liquid crystal molecules at the liquidcrystal layer interface(s) so that these align in the substrate inplanedirection, thereby making it possible to allow the average tilt angle ofliquid crystal layer on or over electrodes to stay below 45 degrees evenupon application of electric fields thereto. In other words, it becomespossible even when applying electric fields to prevent on-electrodeliquid crystals from exhibiting the so-called homeotropic alignment.

[0071]FIG. 44 is an example of a characteristic diagram of a simulationresult, which shows tilt angles of liquid crystal molecules within aliquid crystal layer in the liquid crystal display device of the lateralelectric field scheme, along with a view-angle range in which thecontrast ratio becomes 10 or greater in all directions concerned.

[0072] More specifically, as far as the tilt angle is about 30 degrees,the resultant contrast ratio stays at or above 10 in all the directionswithin the view-angle range with about 40-degree inclination from thevertical direction relative to the display plane, which results inachievement of the intended characteristics that are substantiallyidentical to those in prior art liquid crystal display devices of thelongitudinal electric-field scheme. Furthermore, the less the tiltangle, the more the view-angle range: If the former is about 10 degrees,then the latter expands to exhibits the view-angle range withinclination of about 80 degrees; if the former is 5 degrees or less thenthe latter expands to fill almost the entire range—thus, wide view-anglecharacteristics are obtained.

[0073] In this embodiment, since this is designed to reduce at anyevents the average tilt angle of liquid crystal molecules within theliquid crystal layer between the electrode and on or over thetransparent electrode when applying no electric fields and when applyingan electric field thereto, the rubbing direction of alignment filmsORI1, ORI2 to be later described are set in initial alignment state sothat the initial pretilt angle of liquid crystal molecules at theinterfaces of the liquid crystal layer on the sides of two substratesSUB1, SUB2 is in a spray state to thereby ensure that certain liquidcrystal molecules at or near the center of the liquid crystal layerexhibit maximized parallelism with respect to the interfaces.

[BRIEF DESCRIPTION OF THE DRAWINGS]

[0074]FIG. 1 is a diagram showing a plan view of main part of one pixelalong with its nearby portions of a liquid crystal display section of acolor liquid crystal display device of the active matrix type inaccordance with an embodiment 1 of the present invention.

[0075]FIG. 2 is a diagram showing a sectional view of the pixel takenalong a cut line 3-3 of FIG. 1.

[0076]FIG. 3 is a sectional diagram of a thin-film transistor elementTFT as taken along cut line 4-4 of FIG. 1.

[0077]FIG. 4 is a sectional diagram of a storage capacitor Cstg alongline 5-5 of FIG. 1.

[0078]FIG. 5 is a plan view for use in explaining an arrangement of amatrix peripheral section of a display panel.

[0079]FIG. 6 is a sectional diagram showing panel edge sections with ascan signal terminal on its left-hand side and without any externalconnection terminal on the right-hand side thereof.

[0080]FIG. 7A is a plan view diagram showing a nearby part of aconnection section of a gate terminal GTM and gate lead GL; and FIG. 7Bis a sectional diagram thereof.

[0081]FIG. 8A is a plan view diagram showing a nearby part of aconnection section of a drain terminal DTM and image signal line DL; andFIG. 8B is a sectional diagram thereof.

[0082]FIG. 9A is a plan view diagram showing a nearby part of aconnection section of a common electrode terminal CTM and common busline CB as well as common voltage signal line CL; and FIG. 9B is asectional diagram thereof.

[0083]FIG. 10 is a circuit diagram including a matrix section and itsperiphery of the active-matrix color liquid crystal display device ofthe present invention.

[0084]FIG. 11 is a diagram showing drive waveforms of the active-matrixcolor liquid crystal display device of the present invention.

[0085]FIG. 12 is a flow chart showing some major steps A-C in themanufacture of a substrate SUB1 side part along with correspondingsectional views of a pixel section and of a gate terminal section.

[0086]FIG. 13 is a flow chart showing some major steps D-F in themanufacture of the substrate SUB1 side part along with correspondingsectional views of the pixel section and gate terminal section.

[0087]FIG. 14 is a flowchart showing some major steps G-H in themanufacture of the substrate SUB1 side part along with correspondingsectional views of the pixel section and gate terminal section.

[0088]FIG. 15 is a top plan view diagram showing the state in whichperipheral drive circuitry is mounted on a liquid crystal display panel.

[0089]FIG. 16 is a diagram showing a sectional structure of a tapecarrier package TCP in which an integrated circuit chip CH1 constitutingdriver circuitry is mounted on a flexible printed circuit board.

[0090]FIG. 17 is a main-part sectional diagram showing the state inwhich the tape carrier package TCP is connected to a scan signal circuitterminal GTM of a liquid crystal display panel PNL.

[0091]FIG. 18 is an explosive perspective diagram of a liquid crystaldisplay module.

[0092]FIG. 19 is a diagram showing a relation of an electric fieldapplication direction and a rubbing direction as well as a polarizerplate's penetration axis.

[0093]FIG. 20 is a main-part plan view diagram showing one pixel alongwith its outlying part of a liquid crystal display section of anactive-matrix color liquid crystal display device of an embodiment 2 ofthe present invention.

[0094]FIG. 21 is a main-part plan view diagram showing one pixel alongwith its outlying part of a liquid crystal display section of anactive-matrix color liquid crystal display device of an embodiment 3 ofthe present invention.

[0095]FIG. 22 is a main-part plan view diagram showing one pixel alongwith its outlying part of a liquid crystal display section of anactive-matrix color liquid crystal display device of an embodiment 4 ofthe present invention.

[0096]FIG. 23 is a main-part plan view diagram showing one pixel alongwith its outlying part of a liquid crystal display section of anactive-matrix color liquid crystal display device of an embodiment 5 ofthe present invention.

[0097] FIGS. 24A-C are main-part plan view diagrams and a sectional viewwhich show one pixel along with its outlying part of a liquid crystaldisplay section of an active-matrix color liquid crystal display deviceof an embodiment 6 of the present invention.

[0098]FIG. 25 is a main-part plan view diagram showing one pixel alongwith its outlying part of a liquid crystal display section of anactive-matrix color liquid crystal display device of an embodiment 7 ofthe present invention.

[0099]FIG. 26 is a sectional diagram taken along a cut line 6-6 of FIG.25.

[0100]FIG. 27 is a sectional diagram of a thin-film transistor elementTFT along line 7-7 of FIG. 25.

[0101]FIG. 28 is a sectional diagram of a storage capacitor Cstg at line8-8 of FIG. 25.

[0102]FIG. 29A is a plan view showing a nearby part of a connectionsection of a gate terminal GTM and gate lead GL; and FIG. 29B is asectional diagram thereof.

[0103]FIG. 30A is a plan view showing a nearby part of a connectionsection of a drain terminal DTM and image signal line DL; and FIG. 30Bis a sectional diagram thereof.

[0104]FIG. 31A is a plan view showing a nearby part of a connect sectionof a common electrode terminal CTM1 and common bus line CB1 as well ascommon voltage signal line CL; and FIG. 31B is a sectional diagramthereof.

[0105]FIG. 32A is a plan view showing a nearby part of a connect sectionof a common electrode terminal CTM2 and common bus line CB2 plus commonvoltage signal line CL; and FIG. 32B is a sectional diagram thereof.

[0106]FIG. 33 is a circuit diagram including a matrix section and itsperiphery of the active-matrix color liquid crystal display device ofthe present invention.

[0107]FIG. 34 is a diagram showing drive waveforms of the active-matrixcolor liquid crystal display device of the present invention.

[0108]FIG. 35 is a flow chart showing some major steps A-C in themanufacture of a substrate SUB1 side part along with correspondingsectional views of a pixel section and of a gate terminal section.

[0109]FIG. 36 is a flowchart showing some major steps D-E in themanufacture of the substrate SUB1 side part along with correspondingsectional views of the pixel section and gate terminal section.

[0110]FIG. 37 is a flowchart showing a step F in the manufacture of thesubstrate SUB1 side part along with corresponding sectional views of thepixel section and gate terminal section.

[0111]FIG. 38 is a main-part plan view diagram showing one pixel alongwith its outlying part of a liquid crystal display section of anactive-matrix color liquid crystal display device of an embodiment 8 ofthe present invention.

[0112]FIG. 39 is a main-part plan view diagram showing one pixel alongwith its outlying part of a liquid crystal display section of anactive-matrix color liquid crystal display device of an embodiment 9 ofthe present invention.

[0113]FIG. 40 is a main-part plan view diagram showing one pixel alongwith its outlying part of a liquid crystal display section of anactive-matrix color liquid crystal display device of an embodiment 10 ofthe present invention.

[0114] FIGS. 41A-D are diagrams showing principles of the presentinvention, wherein FIG. 41A is a characteristic diagram showing avoltage potential distribution within a liquid crystal layer when avoltage is applied to electrodes, FIG. 41B is a plan view diagramshowing a realignment state of those liquid crystal molecules near oraround the center of the liquid crystal layer, FIG. 41C is acharacteristic diagram showing rotation angles α of liquid crystalmolecules shown in FIG. 41B, and FIG. 41D is one exemplarycharacteristic diagram showing a distribution of the transmissivity ofrays of light passing through the liquid crystal layer on or over theupper and lower polarizer plates and upper/lower substrates pluselectrodes as well as between electrodes concerned.

[0115]FIG. 42 is a diagram showing principles of the present invention,wherein FIG. 42A is a characteristic diagram showing the state ofequal-potential “contour” lines each connecting the points of the samepotential when applying a voltage to a transparent electrode whereasFIG. 42B and FIG. 42C are one example of a diagram showing the rotationangle α of liquid crystal molecules within a liquid crystal layer uponapplication of an electric field thereto along with the tilt (rise-up)angle thereof.

[0116]FIG. 43 is a diagram showing principles as to improvement of theaperture ratio of an active-matrix color liquid crystal display devicein accordance with an embodiment 11 of the present invention, whereinFIG. 43A is a characteristic diagram showing a voltage potentialdistribution within a liquid crystal layer when a voltage is applied toan electrode(s), FIG. 43B is a plan view diagram showing a realignmentstate of those liquid crystal molecules near or around the center of theliquid crystal layer, FIG. 43C is a characteristic diagram showingrotation angles α of liquid crystal molecules shown in FIG. 43B, andFIG. 43D is an example of a characteristic diagram showing adistribution of the transmissivity of rays of light passing through aliquid crystal layer on or over the upper and lower polarizer plates andupper/lower substrates plus electrodes as well as between electrodesconcerned.

[0117]FIG. 44 is one example of a characteristic diagram of a simulationresult showing a tilt angle of liquid crystal molecules within a liquidcrystal layer along with a viewing angle region which becomes greaterthan or equal to 10 in contrast ratio with respect to all directions ina liquid crystal display device of the lateral electric field scheme.

[MODES CARRYING OUT THE INVENTION]

[0118] The present invention, still other objects of the presentinvention, and yet other features of the present invention will becomesapparent from the explanation presented below with reference to theaccompanying drawings.

[0119] (Embodiment 1)

[0120] <<Active-Matrix Liquid Crystal Display Device>>

[0121] An explanation will be given of a color liquid crystal displaydevice of the active matrix type to which the present invention isapplied. Note that in the drawings as will be explained below, thosewith the same function will be added with the same reference symbol, andany repetitive explanation will be eliminated.

[0122] <<Planar Arrangement of Matrix Section (Pixel Section)>>

[0123]FIG. 1 is a plan view diagram showing one pixel along with itsnearby part of an active-matrix color liquid crystal display device ofthe present invention. (Hatched portions in the drawing indicate atransparent conductive film g2.)

[0124] As shown in FIG. 1, each pixel is disposed within a crossoverregion (within an area as surrounded by four signal lines) of a scansignal line (gate signal line or horizontal signal line) GL and acontra-voltage signal line (counter electrode lead) CL plus twoneighboring image signal lines (drain signal lines or vertical signallines) DL. Each pixel includes a thin-film transistor TFT, a storagecapacitor Cstg, a pixel electrode PX, and a counter electrode CT. Thescan signal line GL and contra-voltage signal line CL are a plurality oflines that extend in the lateral direction in the drawing and disposedin the upward/downward direction. A plurality of image signal lines DLare provided which extend in the up/down direction and laid out in therightward/leftward or lateral direction. The pixel electrode PX isconnected via a source electrode SD1 to a thin-film transistor TFT,whist the counter electrode CT is integral with the contra-voltagesignal line CL.

[0125] Two neighboring pixels in the up/down direction along the imagesignal line DL are arranged so that their planar arrangements overlapeach other when folded along line “A” of FIG. 1. This is for reductionof the resistance of such contra-voltage signal line CL by commonizing acontra-voltage signal line CL between two pixels that neighbor eachother in the up/down direction along the image signal line DL to therebyincrease the electrode width of the contra-voltage signal line CL.Whereby, it is made easier to sufficiently supply a contra-voltage fromexternal circuitry to the counter electrode CT of each of laterallyadjacent pixels.

[0126] The pixel electrode PX and counter electrode CT oppose each otherto control the optical state of liquid crystal LC by an electric fieldbetween each pixel electrode PX and counter electrode CT to therebycontrol displaying. The pixel electrode PX and counter electrode CT aredesigned into a comb-like shape so that each becomes an elongateelectrode in the up/down direction of the drawing.

[0127] The required number “O” of counter electrodes CT within a singlepixel (i.e. the number of comb teeth) is arranged to have a relation ofO=P+1 relative to the number “P” of pixel electrodes PX (comb teethnumber) without failure in any events (in this embodiment, 0=3, P=2).This is in order to alternately dispose the counter electrodes CT andpixel electrodes PX while forcing the counter electrode CT to resideadjacent to its associated image signal line DL with no failures.Whereby, it is possible to allow the counter electrode CT to shieldthose electric flux lines extending from the image signal line DL tothereby ensure that an electric field between the counter electrode CTand pixel electrode PX receive no influence from an electric fieldgenerated from the image signal line DL. As the counter electrode CT isbeing constantly supplied with a voltage potential from the outside by acontra-voltage signal line CL as will be described later, its potentialis stabilized. Due to this, even when it is immediately adjacent to itsneighboring image signal line DL, the potential will hardly vary. Inaddition, with such an arrangement, the geometric position of the pixelelectrode PX from the image signal line DL becomes farther so that theparasitic capacitance between the pixel electrode PX and image signalline DL decreases significantly thereby also enabling suppression of anypossible variation of a pixel electrode potential Vs otherwise occurringdue to an image signal voltage. With these arrangements, it is possibleto suppress or reduce cross-talk (i.e. image quality defect called the“longitudinal smear”) occurring in the up/down direction.

[0128] Let the pixel electrode PX and counter electrode CT measure 6 μmin electrode width. This is to provide sufficiently larger setup thanthe thickness, 3.9 μm, of a liquid crystal layer to be described laterin order to apply sufficient electric field to the entire liquid crystallayer with respect to the thickness direction of the liquid crystallayer while at the same time letting it be as fine as possible in orderto increase the aperture ratio. In addition, in order to preventelectrical connection failure or open-circuiting, the electrode width ofimage signal line DL is designed to be wider by little than that of thepixel electrode PX and counter electrode CT—typically, 8 μm. Here, theelectrode width of image signal line DL is set so that it becomes lessthan or equal to twice of the electrode width of its neighboring counterelectrode CT. Alternatively, in cases where the electrode width of imagesignal line DL has been determined depending on the productivity of theyield, let the electrode width of the counter electrode CT neighboringupon the image signal line DL be less than or equal to half of theelectrode width of image signal line DL. This is for allowing counterelectrodes CT on the opposite sides to absorb electric flux linesgenerated from the image signal line DL: To absorb electric flux linesgenerated from one certain electrode width, it is required to use anelectrode having an electrode width that is greater than or equal to it.Accordingly, since the respective counter electrodes CT on the oppositesides are expected to absorb electric flux lines generated from the half(4 μm for each) of the electrode of the image signal line DL, let theelectrode width of the counter electrode CT neighboring the image signalline DL be ½ or more. This prevents generation of crosstalk due toinfluence of image signals, in particular, the up/down-direction(longitudinal crosstalk).

[0129] The scan signal line GL is designed to have its electrode widthwhich satisfies a resistance value that permits application of asufficient scanning voltage to a gate electrode GT of a pixel on thedistal end side (on the opposite side of a scan voltage terminal GTM tobe described later). In addition, the contra-voltage signal line CL alsois set at an electrode width which satisfies a resistance value thatenables application of a sufficient contra-voltage to the counterelectrode CT of such pixel on the distal end side (on the opposite sideof a common bus line to be discussed later).

[0130] On the other hand, let the electrode distance or interval betweenthe pixel electrode PX and counter electrode CT change depending on aliquid crystal material used. This is for setting, in view of the factthat a different liquid crystal material results in difference inelectric field intensity for achieving the maximum transmissivity, theelectrode distance depending on the liquid crystal material in order toinsure obtainability of the maximum transmissivity within a range of themaximum amplitude of a signal voltage as set at the withstanding voltageof an image signal drive circuit (signal-side driver) used herein.Supposing that a liquid crystal material to be described later is used,the electrode distance becomes 16 μm.

[0131] <<Sectional Arrangement of Matrix Section (Pixel Section)>>

[0132]FIG. 2 is a diagram showing a cross-section taken along cut line3-3 of FIG. 1; FIG. 3 is a sectional diagram of a thin-film transistorTFT taken along line 4-4 of FIG. 1; and, FIG. 4 is a diagram showing incross-section a storage capacitor Cstg at line 5-5 of FIG. 1. As shownin FIG. 2 to FIG. 4, a thin-film transistor TFT and storage capacitorCstg plus electrode group are formed on the side of a lower transparentglass substrate SUB1 with a liquid crystal layer LC being as areference, whist a color filter FIL and optical shielding black matrixpattern BM are formed on the side of an upper transparent glasssubstrate SUB2.

[0133] In addition, orientation or “alignment” films ORI1, ORI2 forcontrol of the initial alignment of liquid crystal are formed on insidesurfaces (on the liquid crystal LC side) of the transparent glasssubstrates SUB1, SUB2, respectively, whist polarizer plates (Cross Nicollayout) are provided on outside surfaces of respective ones of thetransparent glass substrates SUB1, SUB2 in such a way that thepolarization light axes are at right angles to each other.

[0134] <<TFT Substrate>>

[0135] A detailed explanation will first be given of an arrangement onthe side of the lower transparent glass substrate SUB1 (TFT substrate).

[0136] <<Thin-Film Transistor TFT>>

[0137] A thin-film transistor TFT operates in a way such that uponapplication of a positive bias to its gate electrode GT, the channelresistance between the source and drain decreases; when letting the biasbe zero, the channel resistance increases.

[0138] As shown in FIG. 3, the thin-film transistor TFT has a gateelectrode GT, gate insulation film GI, i-type semiconductor layer ASmade of i-type (intrinsic, without doping of any conductivity-typedetermining impurity) amorphous silicon (Si), and a pair of activeregions consisting of a source electrode SD1 and drain electrode SD2.Additionally, in view of the fact that the source and drain areinherently determinable by a bias polarity therebetween, the polaritythereof will be inverted during operations in the circuitry of thisliquid crystal display device; thus, it would be understood so that thesource and drain are interchangeable during operations. However, in theexplanation below, one of them will be fixedly referred to as the“source” whereas the other as “drain” for purposes of convenience indiscussion only.

[0139] <<Gate Electrode GT>>

[0140] The gate electrode GT is formed so that it is continuous with ascan signal line GL, wherein a partial region of the scan signal line GLis arranged to become the gate electrode GT. The gate electrode GT isthe part that goes beyond the active regions of the thin-film transistorTFT, which is formed relatively largely than it to thereby completelycover the i-type semiconductor layer AS (when looking at from its lowerpart). Whereby, it is deviced to prevent any externally incoming lightand backlight rays from hitting the i-type semiconductor layer AS, inaddition to the function of the gate electrode GT. In this example, thegate electrode GT is formed of a single-layered conductive film g1. Theconductive film g1 is made of an aluminum (Al) film as formed bysputtering, for example, on which an anodized film AOF of Al isprovided.

[0141] <<Scan Signal Line GL>>

[0142] The scan signal line GL is formed of a conductive film g1. Thisconductive film g1 of the scan signal line GL is fabricated at the sameprocess step of the conductive film g1 of the gate electrode GT so thatthese are formed integrally with each other. This scan signal line GLpermits supplement of a gate voltage Vg from external circuitry to thegate electrode GT. In addition, an anodized film AOF of Al is alsoprovided on the scan signal line GL. Note that a portion crossed with animage signal line DL is narrowed for reduction of the possibility ofshort-circuiting with the image signal line DL; simultaneously, it isY-bent to resemble a crotch in shape to enable cut-and-separation forelectrical disconnection is recommendable] even when shortcircuitingoccurs.

[0143] <<Counter Electrode CT>>

[0144] The counter electrode CT is constituted from a conductive film g1of the same layer as the gate electrode GT and scan signal line GL. Inaddition, an anodized film AOF of Al is also provided on the counterelectrode CT. An arrangement is employed causing a contravoltage Vcom tobe applied to the counter electrode CT. In this embodiment, the counterelectrode Vcom is set at a selected potential level which is lower by aspecified degree than an intermediate DC voltage potential that isbetween the minimum level of drive voltage Vdmin and maximum level ofdrive voltage Vdmax being applied to the image signal line DL, whichdegree corresponds to a feed-through voltage ΔVs as generated when thethin-film transistor TFT is turned off, although an AC voltage mayalternatively be applied thereto in cases where it is required that thepower supply voltage of an integrated circuit to be used in image signaldrive circuitry be half-reduced in potential.

[0145] <<Contravoltage Signal Line CL>>

[0146] The contra-voltage signal line CL is formed of a conductive filmg1. This conductive film g1 of the contravoltage signal line CL isfabricated at the same process step of forming the conductive film g1 ofthe gate electrode GT, scan signal line GL and counter electrode CT, andalso is arranged to be integral with the counter electrode CT. Thiscontravoltage signal line CL permits supplement of a contravoltage Vcomfrom external circuitry to the counter electrode CT. In addition, ananodized film AOF of Al is provided on the contravoltage signal line CLalso. Note here that a portion crossed with the image signal line DL isnarrowed, as in the scan signal line GL, in order to decrease thepossibility of shortcircuiting with the image signal line DL;simultaneously, it is Y-bent to resemble a crotch in shape tocut-and-separation for electrical disconnection even upon occurrence ofshortcircuiting.

[0147] <<Dielectric Film GI>>

[0148] The dielectric film GI is for use as a gate insulation film forgiving an electric field to the semiconductor layer AS along with thegate electrode GT in the thin-film transistor TFT. The dielectric filmGI is formed overlying the gate electrode GT and scan signal line GL. Asthe dielectric film GI, a silicon nitride film is chosen which wasformed by plasma CVD, for example, to a thickness ranging from 1,200 to2,700Å (in this embodiment, 2,400Å or more or less). The gate insulationfilm GI is formed surrounding the entire of a matrix section AR while aperipheral section was removed away thus exposing external connectionterminals DTM, GTM. The dielectric film GI also contributes toelectrical isolation of the image signal line DL with respect to thescan signal line GL and contravoltage signal line CL.

[0149] <<i-Type Semiconductor Layer AS>>

[0150] The i-type semiconductor layer AS is amorphous silicon as formedto a thickness of from 200 to 2,200Å (in this embodiment, approximately2,000Å). A layer d0 is an N(+) type amorphous silicon semiconductorlayer with phosphorus (P) doped therein for ohmic contact, which is leftonly at a portion whereat the i-type semiconductor layer AS is presenton the lower side whereas a conductive layer d1 (d2) exists on the upperside thereof.

[0151] The i-type semiconductor layer AS is also provided between theboth of cross points (crossover sections) of the image signal line DLwith respect to the scan signal line GL and contravoltage signal lineCL. The i-type semiconductor layer AS at these cross points suppressesshortcircuiting between the scan signal line GL and contravoltage signalline CL on one hand and the image signal line DL on the other hand atsuch cross points.

[0152] <<Source Electrode SD1, Drain Electrode SD2>>

[0153] Each of the source electrode SD1 and drain electrode SD2 isconstituted from a conductive film d1 contacted with the N(+) typesemiconductor layer d0 and a conductive film d2 as formed thereon.

[0154] The conductive film d1 may be a chromium (Cr) film that is formedby sputtering to a thickness of from 500 to 1,000Å (about 600Å in thisembodiment). In light of the fact that the Cr films increase in stresswhen formed thick in film thickness, it is to be formed within the rangethat does not exceed the film thickness, such as about 2,000Å. The Crfilm is used in order to make excellent the adhesion with the N(+) typesemiconductor layer d0 while at the same time preventing Al of theconductive film d2 from diffusing into the N(+) semiconductor layer d0(at the aim of so-called barrier layer). The conductive film d1 may bemade of a high-melting-point metal (Mo, Ti, Ta, W) film orhigh-melting-point metal silicide (MbSi₂, TiSi₂, TaSi₂, WSi₂) film inplace of the Cr film.

[0155] The conductive film d2 is formed by sputtering of Al to athickness of 3,000 to 5000Å (in this embodiment, about 4000Å) The Alfilm is less in stress than the Cr film and is capable of fabrication tothick film thicknesses; thus it offers functionality to reduceresistance values of the source electrode SD1 and drain electrode SD2plus image signal line DL and also to insure step-like differenceride-over (improve the step coverage) due to the gate electrode GTand/or i-type semiconductor layer AS.

[0156] After having patterned the conductive film d1 and conductive filmd2 by use of the same mask pattern, the N(+) type semiconductor layer d0is removed away using the same mask or alternatively using theconductive film d1 and conductive film d2 as a mask therefor. In otherwords, residual portions of the N(+) type semiconductor layer do on thei-type semiconductor layer AS other than the conductive film d1 andconductive film d2 are removed in a self-alignment fashion. At thistime, since the N(+) type semiconductor layer d0 is etched so that thewhole part corresponding to its thickness is removed away, the i-typesemiconductor layer AS also will be etched by little on its surfaceportion—such etching degree may be controlled by etching time.

[0157] <<Image Signal Line DL>>

[0158] The image signal line DL is made up of a second conductive filmd2 and third conductive film d3 which are at the same layer of thesource electrode SD1 and drain electrode SD2. In addition, the imagesignal line DL is formed integrally with the drain electrode SD2.

[0159] <<Pixel Electrode PX>>

[0160] The pixel electrode PX is formed of a transparent conductivelayer g2. This transparent conductive film g2 is made of a transparentconductive film (Indium-Tin-Oxide ITO: Nesa film) as formed bysputtering to a thickness of 100 to 2,000Å (in this embodiment, about1,400Å).

[0161] The pixel electrode's becoming transparent as in this embodimentleads to improvement of the maximum optical transmissivity whenperforming white displaying due to rays of light passing through suchportion; thus, it becomes possible to perform brighter displaying ascompared to the case of using opaque pixel electrodes. At this time, aswill be described later, the polarizer plate layout is arranged (in thenormally-black mode) so that liquid crystal molecules retain theirinitial alignment state in the absence of a voltage applied thereto toachieve black displaying under such condition; consequently, even wherepixel electrodes are made transparent, no light rays penetrate suchportions to thereby enable displaying of the black with good quality.This in turn makes it possible to improve the maximum transmissivitywhile achieving sufficient contrast ratio.

[0162] <<Storage Capacitor Cstg>>

[0163] The pixel electrode PX is so formed as to overlap thecontravoltage signal line CL at an opposite end to the end at which itis connected to the thin-film transistor TFT. As apparent from FIG. 4also, this overlapping results in constitution of a storage capacitor(electrostatic capacitive element) Cstg with the pixel electrode PX asits one electrode PL2 and with the contravoltage signal line CL as itsremaining electrode PL1. A dielectric film of this storage capacitorCstg is formed of the anodized film AOF and dielectric film GI used asthe gate insulation film of the thin-film transistor TFT.

[0164] As shown in FIG. 1, regarding the planar configuration, thestorage capacitor Cstg is formed at a portion whereat the width of theconductive film g1 of contravoltage signal line CL is widened in width.

[0165] <<Protective Film PSV1>>

[0166] A protective film PSV1 is provided on the thin-film transistorTFT. The protective film PSV1 is formed to mainly protect the thin-filmtransistor TFT from humidity or the like, wherein the one that is highin transparency and good in moisture vapor resistance is used. Theprotective film PSV1 is made of a silicon oxide film or silicon nitridefilm as fabricated by plasma CVD apparatus, for example, to a filmthickness of approximately 1 μm.

[0167] The protective film PSV1 is formed entirely surrounding thematrix section AR, whose peripheral section has been removed to exposethe external connection terminals DTM, GTM. With regard to a relation ofthicknesses of the protective film PSV1 and gate insulation film GI, theformer is made thick in light of the protection effect whereas thelatter is made thinner in view of the mutual conductance of transistorsinvolved. Accordingly, the protective film PSV1 with high protectingeffect is formed so that it is larger than the gate insulation film GIto ensure that its periphery may also protect over an extended coveragethat is as wide as possible.

[0168] <<Color Filter Substrate>>

[0169] Next, turning back to FIG. 1, FIG. 2, a detailed explanation willbe given of an arrangement of the side of the upper transparent glasssubstrate SUB2 (color filter substrate).

[0170] <<Optical Shield Film BM>>

[0171] An optical shield film BM (so-called black matrix) is formed onthe side of the upper transparent glass substrate SUB2 for preventingreduction of the contrast ratio or the like which otherwise occurs dueto outward emission of transmission light from unnecessary gaps (gapsother than that between the pixel electrode PX and counter electrode CT)toward the display plane side. The optical shield film BM also functionsto prevent rays of either external light or backlight from falling ontothe i-type semiconductor layer AS. More specifically, the i-typesemiconductor layer AS of the thin-film transistor TFT is sandwiched bythe optical shield film BM and the gate electrode GT of larger sizewhich are at the upper and lower locations to thereby eliminate hittingof externally incoming natural light and backlight rays.

[0172] The contour line of a closed polygon of the optical shield filmBM shown in FIG. 1 indicates an opening within which the optical shieldfilm BM is not formed. This contour line pattern is a mere example, andin the case of enlarging the opening portion, it may be replaced with anoptical shield film BM1 as shown by dotted lines of FIG. 1. Although theexpanded region in FIG. 1 can experience disturbance of the electricfield direction, a display at such portion is in one-to-onecorrespondence to image information within pixels so that black isobtained in the case of the black and white for white; accordingly, itcan be utilized as part of such display. In addition, the boundary linein the up/down direction of the drawing is determined by the accuracy ofpositional alignment between the upper and lower substrates; in case thealignment accuracy is better than the electrode width of the counterelectrode CT that neighbors the image signal line DL, it is possible tofurther enlarge the opening section by setting it between widths of thecounter electrode.

[0173] The optical shield film BM has the shielding effect with respectto light, and is made of a highly insulative film for elimination of anybad influence on an electric field between the pixel electrode PX andcounter electrode CT—in this embodiment, it is made of a resist materialmixed with black pigment mixed thereinto as formed to a thickness of 1.2μm, or more or less.

[0174] The optical shield film BM is formed into a net mesh orlattice-like shape around each pixel so that this lattice is forpartitioning the effective display area of a single pixel. Thus, thecontour line of each pixel is made clear by the optical shield film BM.In other words, the optical shield film BM functions as the black matrixwhile at the same time functioning to optically shield the i-typesemiconductor layer AS.

[0175] The optical shield film BM is also formed at the periphery tohave a window frame-like shape, whose pattern is formed in a waycontinuous with a pattern of the matrix section shown in FIG. 1 with aplurality of dot-like openings provided therein. The optical shield filmBM at the periphery is extended toward the outside of a seal section SLthereby preventing leakage light, such as reflection light due topractical mount equipment such as personal computers or else, fromentering or “invading” the matrix section. On the other hand, thisoptical shield film BM is limited in location so that it resides withinan inside area smaller by about 0.3 to 1.0 mm than the edge of thesubstrate SUB2, and also is formed excluding cutaway regions of thesubstrate SUB2.

[0176] <<Color Filter FIL>>

[0177] A color filter FIL is formed to have a stripe shape with red,green and blue being repeated at positions that correspond to pixels.The color filter FIL is formed overlapping edge portions of the opticalshield film BM.

[0178] The color filter FIL can be formed in a way which follows.Firstly, form a dyeing base material such as acrylic resin on thesurface of the upper transparent glass substrate SUB2; then, remove byphotolithography techniques the dyeing base material other thanred-filter formation regions. Thereafter, dye the dyeing base with redpigment; then, effectuate fixation processing to form a red filter R.Next, similar processes are effected to sequentially form a green filterG and blue filter B.

[0179] <<Overcoat Film OC>>

[0180] An overcoat film OC is provided for elimination of leakage of dyeof the color filter FIL into the liquid crystal LC and also forplanarization of step-like surface configuration due to the color filterFIL and optical shield film BM. The overcoat film OC is formed of atransparent resin material such as for example acrylic resin, epoxyresin or the like.

[0181] <<Liquid Crystal Layer and Polarizer Plate>>

[0182] An explanation will next be given of a liquid crystal layer andalignment films as well as polarizer plates and the like.

[0183] <<Liquid Crystal Layer>>

[0184] A nematic liquid crystal material is used as the liquid crystalmaterial LC, which is positive in dielectric anisotropy Δε and measure13.2 in value while its refractive anisotropy Δn is 0.081 (589 nm at 20°C.). The liquid crystal layer is 3.9 μm in thickness and 0.316 inretardation Δn·d. Due to the value setup of this retardation Δn·d, themaximum transmissivity can be obtained in combination with an alignmentfilm(s) and polarizer plate(s) to be described later when letting liquidcrystal molecules rotate in the direction of an electric field by 45°from the rubbing direction, thereby making it possible to obtaintransmitted light with little or no waveform dependency within the rangeof visible light. Additionally, the thickness (gap) of the liquidcrystal layer is controlled by polymer beads.

[0185] It should be noted that the liquid crystal material LC should notbe limited to the one stated above and that the dielectric anisotropy Δεmay alternatively be negative in polarity. In addition, settingdielectric anisotropy Δε at greater values enables a drive voltage todecrease in potential. In addition, reducing the refractive anisotropyΔn makes it possible to increase the thickness (gap) of the liquidcrystal layer, which in turn enables the liquid crystal sealing time tobe shortened while reducing gap deviation.

[0186] Further, investigating the relation of the solid-state propertiesof the liquid crystal material versus the intensity of transmitted lightat part of the transparent conductive film corresponding to either thecounter electrode or the pixel electrode, it has been found that itsignificantly depends on the twist elastic modulus K2 of the liquidcrystal material used. This is because attenuation of inplane twistdeformation at the upper part of the electrode of the transparentconductive film due to a lateral electric field leading to transmissionof light at an opening between electrodes takes place at its inherentcurvature ratio in accordance with the twist elastic modulus K2 of theliquid crystal material. Thus, in order to improve the brightness orluminance of the entire opening including the electrode of thistransparent conductive film by increasing the light transmission at theelectrode portion of the transparent conductive film, a certain liquidcrystal material that is less in twist elastic modulus K2 is employedfor reduction of the attenuation curvature ratio. The effect of thetwist elastic modulus K2 will be further recited in an embodiment 11.

[0187] In this embodiment 1, the twist elastic modulus K2 is set at5.1×10⁻¹² N (Newton) at room temperatures.

[0188] Note that one typical measurement method of the twist elasticmodulus K2 has been disclosed in, for example, “LIQUIDCRYSTALS.Fundamentals,” by Kohji Okano and Shunsuke Kobayashi at pp.216-220 (Baifu-Kan, 1985) cited herein as a reference, which teachesthat the modulus is obtainable through measurement of the thresholdvoltage of a liquid crystal cell twisted.

[0189] <<Alignment Film>>

[0190] Use polyimide as the alignment films ORI. Let the rubbingdirections be parallel to each other for the upper and lower substrateswhile setting the initial alignment angle φLC at 75°, which angle isdefined between the initial alignment direction RDR and the appliedelectric field direction EDR(Ex). Its relation is shown in FIG. 19.

[0191] Additionally, the initial alignment angle φLC defined between theinitial alignment direction RDR and the applied electric field directionEDR is such that when the dielectric anisotropy Δε of the liquid crystalmaterial is positive in polarity, it must be greater than or equal to45° C. and yet less than 90° C. whereas if dielectric anisotropy Δε isnegative then it must exceed 0° and stays below 45°.

[0192] Further, in this embodiment, letting the rubbing directions beparallel to each other with respect to alignment films ORI1, ORI2 causesthe initial pre-tilt angle of liquid crystal molecules at the upper andlower interfaces of the liquid crystal layer contributing to displaybetween electrodes and over electrodes to be in the spray state therebyallowing such liquid crystal molecules to output an effect of mutuallycompensating for optical characteristics resulting in achievement ofwide viewing-angle characteristics.

[0193] Alternatively, letting the rubbing directions be anti-parallel toeach other with respect to the alignment films ORI1, ORI2 causes theinitial pretilt angle of liquid crystal molecules at the upper and lowerinterfaces of the liquid crystal layer to become in the parallel stateresulting in an increase in average tilt angle inside of the liquidcrystal layer; in such case, however, setting the pretilt angle at orbelow 10 degrees enables accomplishment of similar effects of thepresent invention.

[0194] <<Polarizer Plate>>

[0195] As the polarizer plates POL, G1220DU manufactured by NittoDenko-Sha is used, wherein the polarized light transmission axis MAX1 ofa lower side-polarizer plate POL1 is rendered identical to the rubbingdirection RDR whereas the polarized light transmission axis MAX2 of anupper side polarizer plate POL2 is made at right angles thereto. Arelation thereof is shown in FIG. 19. Whereby, it becomes possible toobtain the normally-close characteristic which lets the transmissivityincrease with an increase in a voltage being applied to the pixel of thepresent invention (voltage between the pixel electrode PX and counterelectrode CT), while enabling achievement of black display of goodquality when applying no voltages thereto.

[0196] In addition, the polarizer plate POL2 per se is provided with atransparent conductive film that is formed on its entire surface for thepurpose of eliminating bad influence of static electricity from theoutside to thereby reduce the specific resistance thereof. Thistransparent conductive film may alternatively be formed between theupper substrate SUB2 and the upper polarizer plate POL2.

[0197] <<Arrangement of Matrix Periphery>>

[0198]FIG. 5 is a diagram showing a plan view of main part at theperiphery of the matrix (AR) of the display panel PNL including theupper and lower glass substrates SUB1, SUB2. FIG. 6 is a diagramshowing, on its left side, a cross-section near an external connectionterminal GTM to which scan circuitry is to be connected, and alsoshowing on its right side a cross-section near a seal section at whichno external connection terminals are present.

[0199] With this panel structure, a glass is cut into pieces through aseries of process steps in any case in such a way that if it is small insize then a single glass substrate is used for simultaneous fabricationof a plurality of devices thereon and then subject to subdivision bycutting processes in order to improve the throughput, or alternatively,if it is of large size then a glass substrate of preselected size thatis standardized for any type of products is processed and then madesmaller into a required size adaptable for use with each product type inorder to attain common useability of manufacturing facility. FIG. 5 andFIG. 6 show an example of the latter case, wherein both of FIG. 5 andFIG. 6 represent a structure obtained after having cut the upper andlower substrates SUB1, SUB2, and wherein LN denotes an edge beforecutting. In either case, in the completed state, those portions (upperside and lower side in the drawing) at which the external connectionterminal group Tg, Td and terminal COT (suffix eliminated) exist arelimited so that the size of the upper side substrate SUB2 is inside ofthe lower side substrate SUB1 to thereby expose them. The terminalgroups Tg, Td are the ones each of which is a bundle of plural linesincluding scan circuit connection terminals GTM and image signal circuitconnect terminals DTM along with their extension lead section, as willbe described later respectively, in units of tape carrier packages TCP(FIG. 16, FIG. 17) each having an integrated circuit chip CHI mountedthereon. An extension lead from a matrix section of each group up to anexternal connection terminal section is slanted or tilted as it comescloser to the both ends. This is in order to align the terminals DTM,GTM of the display panel PNL with the layout pitch of packages TCP andalso with the connect terminal pitch at each package TCP. In addition,the counter electrode terminal CTM is a terminal for use in giving acontravoltage from external circuitry to the counter electrode CT. Thecontravoltage signal line CL of matrix section is drawn out toward theopposite side (right side in the drawing) of the scan circuit terminalGTM while bundling together respective contravoltage signal lines by acommon bus line CB for connection to the counter electrode terminal CTM.

[0200] A seal pattern SL is formed between the transparent glasssubstrates SUB1, SUB2 along the edges thereof except for a liquidcrystal sealing port INJ to permit sealing of liquid crystal LC. Theseal material is made of epoxy resin, for example.

[0201] Layers of alignment films ORI1, ORI2 are formed inside of theseal pattern SL. The polarizer plates POL1, POL2 are arranged on outersurfaces of the lower-part transparent glass substrate SUB1 andupper-part transparent glass substrate SUB2, respectively. The liquidcrystal LC is sealed in a region that is partitioned by the seal patternSL between the lower-part alignment film ORI1 and upper-part alignmentfilm ORI2 for setting the direction of liquid crystal molecules. Thelower-part alignment film ORI1 is formed at the upper part of theprotective film PSV1 on the side of the lower-part transparent glasssubstrate SUB1.

[0202] This liquid crystal display device is assembled by laminatingvarious layers independently on the side of the lower-part transparentglass substrate SUB1 and on the side of upper-part transparent glasssubstrate SUB2, forming the seal pattern SL on the substrate SUB2 side,overlapping the lower-part transparent glass substrate SUB1 andupper-part transparent glass substrate SUB2, injecting the liquidcrystal LC from an opening INJ of the seal material SL, sealing theinjection port INJ by epoxy resin or the like, and cutting the upper andlower substrates.

[0203] <<Gate Terminal>>

[0204]FIG. 7A is a plan view diagram showing a connection structurespanning from the display matrix's scan signal line GL up to itsexternal connection terminal GTM; FIG. 7B shows a cross-section at cutline B-B of FIG. 7A. Note that the same drawing corresponds to the FIG.5 right center vicinity, wherein hatched part is represented by astraight line shape for purposes of convenience.

[0205] “AO” is a boundary line of photoresist direct drawing—in otherwords, a photoresist pattern of selective anodization. Accordingly, thisphotoresist is to be removed away after anodization, and the pattern AOshown in the drawing is not left as a complete products; however, itstrace is left because the oxide film AOF is selectively formed at thegate lead GL as shown in the sectional drawing. In the plan viewdiagram, the left side with the photoresist's boundary AO being as areference is the region that is covered with a resist and is not subjectto anodization; the ride side is the region that is exposed from theresist and is anodized. An Al layer g1 anodized has its surface on whichits oxide Al₂O₃ film AOF is formed, wherein the lower conductor partdecreases in volume. Of course, the anodization is performed aftersetting of appropriate time and voltage to ensure that its conductorpart is left.

[0206] Although in the drawing the Al layer g1 is hatched for claritypurposes, a non-anodized region is patterned into a comb-like shape.This is aimed at suppression or minimization of the possibility ofshort-circuiting and/or any possible sacrifice of dielectric constantwhile simultaneously preventing generation of whiskers otherwiseoccurring when the Al layer is wide in width, by narrowing the width ofevery single one for provision of an arrangement of such plurality oflines bundled together.

[0207] The gate terminal GTM is comprised of the Al layer g1 and furthera transparent conductive layer g2 that is for protecting the surface ofit and for improving the reliability of connection with a TCP (TapeCarrier Package). This transparent conductive film g2 makes use of atransparent conductive film ITO that was formed at the same process stepof forming the pixel electrode PX. In addition, the Al layer g1 and theconductive layers d1 and d2 formed on its lateral side are the ones forattempting to reduce the connection resistance by connectingconnectivity-excellent Cr layer d1 to both the Al layer and thetransparent conductive layer g2 in order to compensate for anyconnection failures between the Al layer and the transparent conductivelayer g2; the conductive layer d2 is left due to the fact that it isformed using the same mask as that of the conductive layer d1.

[0208] In the plan view diagram, the gate insulation film GI is formedon the right side relative to its boundary line while the protectivefilm PSV1 is also formed on the right side of its boundary, wherein theterminal section GTM placed on the left edge is arranged to expose fromthem and enable electrical contact with external circuitry. Although inthe drawing only one pair of the gate line GL and gate terminal isdepicted, the actual implementation is such that a plurality of suchlines are laid out in the up/down direction as shown in FIGS. 7A, B toconstitute the terminal group Tg (FIG. 5), wherein the left end of thegate terminal is extended beyond the cutting region of the substrate tobe shortcircuited by a lead SHg (not shown) during manufacturingprocesses. Such shortcircuiting line SHg during manufacturing processesis useful for power feed at the step of anodization and also forelectrostatic breakdown during rubbing or else of the alignment filmORI1.

[0209] <<Drain Terminal DTM>>

[0210]FIG. 8A shows a plan view diagram showing connection from theimage signal line DL to its external connection terminal DTM; FIG. 8Bshows a cross-section at cut line B-B of FIG. 8A. Note that the samedrawing corresponds to the FIG. 5 upper right vicinity, and thatalthough the direction of the drawing is changed for conveniencepurposes, the right end direction corresponds to the upper end sectionof the substrate SUB1.

[0211] “TSTd” is a test terminal to which external circuitry is notconnected and which is widened to have a width greater than that of thelead section to permit contacting of a probe needle or the like.Similarly, the drain terminal DTM also is widened to have a widthgreater than that of the lead portion to enable connection with externalcircuitry. External connection drain terminals DTM are laid out in theup/down direction; as shown in FIG. 5, the drain terminals DTMconstitute the terminal group Td (suffix eliminated) and are designed tofurther extend beyond the cut line of the substrate SUB1, all of whichare shortcircuited to one another by more than one lead SHd (not shown)during manufacturing processes for prevention of electrostaticbreakdown. As shown in FIG. 8A, test terminals TSTd are formed atalternate ones of the image signal lines DL.

[0212] The drain connection terminal DTM is formed of a single layer oftransparent conductive layer g2, and is connected to an image signalline DL at certain part from which the gate insulation film GI isremoved away. This transparent conductive film g2 makes use of atransparent conductive film ITO that was formed at the same process stepof forming pixel electrodes PX as in the case of the gate terminal GTM.A semiconductor layer AS formed on the end portion of the gateinsulation film GI is for use in etching the edge of gate insulationfilm GI into a taper shape. Obviously, on or over the drain terminalDTM, the protective film PSV1 has been removed in order to performconnection with external circuitry.

[0213] An extension lead from the matrix section up to the drainterminal section DTM is such that those layers d1, d2 at the same levelas the image signal line DL are arranged at a midway portion of theprotective film PSV1 and connected with the transparent conductive filmg2 within the protective film PSV1. This is aimed at maximizedprotection of the easily electrolytically corrodible Al layer d2 by useof the protective film PSV1 and/or seal pattern SL.

[0214] <<Counter Electrode Terminal CTM>>

[0215]FIG. 9A shows a plan view diagram showing connection from thecontravoltage signal CL up to its external connection terminal CTM; FIG.9B shows a cross-section at cut line B-B of FIG. 9A. Note that thedrawing corresponds to the upper left part of FIG. 5 or therearound.

[0216] Respective contravoltage signal lines CL are bundled by a commonbus line CB to be drawn out toward the counter electrode terminal CTM.The common bus line CB is structured from a lamination of a conductivelayer d1 and conductive layer d2 on the conductive layer g1. This is inorder to reduce the resistivity of the common bus line CB to therebyensure that a contravoltage is sufficiently supplied from externalcircuitry to each contravoltage signal line CL. In the structure shownherein, a feature thereof lies in ability to reduce the resistance ofthe common bus line without newly loading any specific conductivelayers. The conductive layer g1 of the common bus line CB is eliminatedfrom anodization to insure electrical connection with the conductivelayers d1 and conductive layer d2. Additionally, it is exposed from thegate insulation film GI also.

[0217] The counter electrode terminal CTM is structured from theconductive layer g1 and the transparent conductive layer g2 as laminatedthereon. This transparent conductive film g2 employs a transparentconductive film ITO that was formed at the same process step of formingpixel electrodes PX, as in the other terminals. The conductive layer g1is covered with the transparent conductive layer g2 that is excellent indurability in order to let the transparent conductive layer g2 protectits surface for elimination of electrolytic corrosion.

[0218] <<Display Device Overall Equivalent Circuit>>

[0219] An equivalent circuit of the display matrix section and itsperipheral circuit's connection diagram are shown in FIG. 10. While thisdrawing is a circuit diagram, it has been illustrated in a waycorresponding to the actual geometric layout. “AR” is a matrix arraywith a plurality of pixels laid out in a two-dimensional fashion.

[0220] In the drawing, “X” means image signal lines DL adhered withsuffices “G,” “B,” and “R” which stand for green, blue and red pixels,respectively. “Y” means scanning signal lines GL added with suffices 1,2, 3, . . . , “end” as per the order of sequence of the scan timing.

[0221] The scan signal lines Y (suffix eliminated) are connected to avertical scan circuit V, whist the image signal lines X (suffix omitted)are coupled to an image signal driving circuit H.

[0222] “SUP” is circuitry including a power supply circuit for obtaininga plurality of stabilized voltage sources as voltage-divided from asingle voltage source along with a circuit or circuits for conversion ofinformation for a CRT (cathode-ray tube) from a host (upper-level or“supervisory” arithmetic processing device) into information for usewith a TFT liquid crystal display device.

[0223] <<Driving Method>>

[0224] Several drive waveforms of the liquid crystal display device ofthe present invention are shown in FIG. 11.

[0225] As in the embodiment 1 the contravoltage signal line CL is madeof the conductive film g1 of a low-resistivity metal such as aluminum,the load impedance is less reducing waveform deformation of acontravoltage. Due to this, it becomes possible to employ an AC voltageas the contravoltage, which in turn advantageously reduces the signalline voltage.

[0226] More specifically, the contravoltage is designed to have arectangular AC waveform with binary values of Vch and Vcl, while lettinga non-selected voltage of scan signals Vg(i−1), Vg(i) change betweenbinary values Vglh and Vgll in synchronism therewith once per scanperiod. Let the amplitude value of such contravoltage be the same as theamplitude of the non-select voltage. An image signal voltage is thevoltage equivalent to a desired voltage being applied to the liquidcrystal layer from which ½ of the amplitude of the contravoltage issubtracted.

[0227] While the contravoltage may be a DC voltage, use of an AC voltagemakes it possible to reduce the maximum amplitude of image signalvoltage, which in turn enables employment of a low-withstanding-voltagecircuit for the image signal drive circuit (signal-side driver). Inembodiments 2, 3 to be described later, since the contravoltage signalline CL is formed of a transparent conductive film g2, the resistancebecomes comparatively high; in such cases, the contravoltage ispreferably of the DC scheme.

[0228] <<How Storage Capacitor Cstg Works>>

[0229] The storage capacitor Cstg is provided for long accumulatingtherein image information as written into a pixel (after the thin-filmtransistor TFT was turned off). In the scheme used in the presentinvention for applying an electric field in a direction parallel to thesubstrate surface, unlike the scheme for applying an electric field in avertical direction relative to the substrate surface, the storagecapacitor Cstg is incapable of accumulating image information in a pixeldue to the fact that little or no capacitance (known as liquid crystalcapacitance) is present which is formed by a pixel electrode and itscounter electrode. Accordingly, with the scheme for applying an electricfield in a direction parallel to the substrate surface, the storagecapacitor Cstg is the essential subject matter.

[0230] In addition, when the thin-film transistor TFT performsswitching, the storage capacitor Cstg also functions to reduce influenceof a gate potential variation ΔVg with respect to a pixel electrodepotential Vs. This may be represented by:

ΔVs={Cgs/(Cgs+Cstg+Cpix)}×ΔVg,

[0231] where, Cgs is the parasitic capacitance as formed between thegate electrode GT and the source electrode SD1 of a thin-film transistorTFT, Cpix is the capacitance formed between a pixel electrode PX and itscounter electrode CT, and ΔVs is a variation component of the pixelelectrode potential due to ΔVg, also known as feed-through voltage.While this variation component ΔVs becomes the cause of a DC componentbeing applied to the liquid crystal LC, it is possible to decrease itsvalue by increasing the storage capacitor Cstg. Reduction of DCcomponents being applied to the liquid crystal LC leads to improvementof the lifetime of liquid crystal LC while at the same time enablingsuppression of the so-called “burn-in” or “seizing” phenomenon that aprior image is left upon switching of a liquid crystal display screen.

[0232] As previously discussed, as the gate electrode GT is enlargedenough to completely cover the i-type semiconductor layer AS, an overlaparea with the source electrode SD1 and drain electrode SD2 increasesaccordingly, resulting in an increase in parasitic capacitance Cgs,which in turn leads to creation of an adverse effect that the pixelelectrode potential Vs can readily receive influence of the gate (scan)signal Vg. However, provision of the storage capacitor Cstg makes itpossible to avoid this demerit.

[0233] <<Manufacturing Method>>

[0234] An explanation will next be given of a manufacturing method ofthe substrate SUB1 side of the above-mentioned liquid crystal displaydevice with reference to FIG. 12 to FIG. 14. Note that in thesedrawings, the characters centrally indicated therein are process namesabbreviated, wherein a flow of fabrication process steps is shown whileindicating on its left side a cross-section of the thin-film transistorTFT part shown in FIG. 3 along with a cross-section at or near the gateterminal shown in FIG. 7 on the right side. Except for a process step Band step D, step A-step I are partitioned in a way corresponding to eachphotographic processing, wherein any one of such process steps indicatesthe stage whereat the fabrication processing after the photographicprocess has been completed with a photoresist removed already. Note herethat the term “photographic processing” as used herein refers to aseries of works covering from deposition of a photoresist throughselective exposure using a mask up to development thereof, and anyrepetitive explanation will be eliminated. An explanation below will begiven in accordance with the process steps thus partitioned.

[0235] Step A, FIG. 12

[0236] Provide by sputtering a conductive film g1 that is made of Al—Pd,Al—Si, Al—Ta, Al—Ti—Ta, or the like on the lower transparent glasssubstrate SUB1 comprised of AN635 glass (Trade Name), to a thickness of3,000Å. After having effected photographic processing, selectively etchthe conductive film g1 by use of a mixed acid liquid consisting ofphosphoric acid and nitric acid plus glacial acetic acid. Thus, formgate electrodes GT, scan signal lines GL, counter electrodes CT,contravoltage signal lines CL, electrodes PL1, gate terminals GTM, firstconductive layer of common bus lines CB, first conductive layer ofcounter electrode terminals CTM, anodized bus lines SHg (not depicted)for connection of the gate terminals GTM, and anodized pads (notdepicted) as connected to the anodized bus lines SHg.

[0237] Step B, FIG. 12

[0238] After having formed an anodization mask AO due to directpainting, put the substrate SUB1 into an anodization liquid that iscomprised of a liquid of 3%-tartaric acid as adjusted at PH 6.25±0.05 byammonia, which liquid is in turn diluted to 1:9 using ethylene glycolliquid, to thereby perform adjustment so that the formation currentdensity is at 0.5 mA/cm² (constant current formation). Next, performanodization until it reaches the target formation voltage of 125V asrequired for obtainment of a predetermined Al₂O₃ film thickness.Thereafter, it is desirable that this condition be retained several tensof minute (constant voltage formation). This is important for obtainmentof a uniform Al₂O₃ film. Whereby, the conductive film g1 is anodizedthereby forming an anodized film AOF, 1,800Å thick, on the gateelectrodes GT, scan signal lines GL, counter electrodes CT,contravoltage signal lines CL and electrodes PL1.

[0239] Step C, FIG. 12

[0240] After having introduced into plasma CVD apparatus an ammonia gasand shiran gas plus nitrogen gas to provide a Si nitride film of 2,200Åthick, and then introduce a shiran gas and hydrogen gas into the plasmaCVD apparatus to provide an i-type amorphous Si film of 2,000Å thick;thereafter, introduce a hydrogen gas and phosphine gas into the plasmaCVD apparatus to thereby provide an N(+) type amorphous Si film to athickness of 300Å.

[0241] Step D, FIG. 13

[0242] After having effected photographic processing, selectively etchthe N(+) type amorphous Si film and i-type amorphous Si film by usingSF₆ and CCl₄ as dry etching gases to thereby form more than one islandof i-type semiconductor layer AS.

[0243] Step E, FIG. 13

[0244] After the photographic processing, selectively etch the Sinitride film by use of SF₆ as a dry etching gas.

[0245] Step F, FIG. 13

[0246] Provide by sputtering a transparent conductive film g2 made of anITO film of 1,400Å thick. After photographic processing, selectivelyetch the transparent conductive film g2 by using as etching liquid amixed acid liquid of hydrochloric acid and nitric acid, thereby formingthe uppermost layer of gate terminals GTM along with the secondconductive layer of drain terminals DTM and counter electrode terminalsCTM.

[0247] Step G, FIG. 14

[0248] Provide by sputtering a conductive film d1 made of Cr to athickness of 600Å; further provide by sputtering a conductive film d2,4,000Å thick, as made of Al—Pd, Al—Si, Al—Ta, Al—Ti—Ta or the like.After photographic processing, use the same liquid as that used at thestep B to etch the conductive film d2; then, use the same liquid as thatat the step A to etch the conductive film d1 to thereby form the secondconductive layer, third conductive layer of image signal lines DL,source electrodes SD1, drain electrodes SD2, pixel electrodes PX,electrodes PL2 and common bus lines CB, along with more than one busline SHd (not shown) for shortcircuiting of the drain terminals DTM.Next, introduce CCl₄ and SF₆ into the dry etching apparatus to etch theN(+) type amorphous Si film for selective removal of an N(+) typesemiconductor layer d0 between the source and drain.

[0249] Step H, FIG. 14

[0250] Introduce into the plasma CVD apparatus an ammonia gas and shirangas plus nitrogen gas to provide a 1 μm-thick Si nitride film. Afterphotographic processing, form a protective film PSV1 by selectivelyetching the Si nitride film by photolithography techniques using SF₆ asa dry etching gas.

[0251] <<Display Panel PNL & Drive Circuit Board PCB1>>

[0252]FIG. 15 is an upper-side plan-view diagram showing the state inwhich the display panel PNL shown in FIG. 5 and the like is connectedwith an image signal drive circuit H and vertical scanning circuit V.

[0253] CH1 is driver IC chips for use in driving the display panel PNL(lower five ones are driver IC chips on the vertical scan circuit sidewhereas every left-side group of ten ones are driver IC chips on theimage signal drive circuit side). TCP is a tape carrier package withdriver IC chips CHI mounted thereon by tape-automated bonding (TAB)methods as will be described later with reference to FIG. 16 and FIG.17; PCB1 is a driver circuit board with the TCP and capacitors or elsemounted thereon, which is divided into two portions one of which is forimage signal driver circuit and the other of which is for scan signaldriver circuit. FGP is frame ground pads to which spring-like fragmentsprovided by cutting in a shield case SHD are to be soldered. FC is flatcables for electrical connection of the lower-side driver circuit boardPCB1 and left-side driver circuit board PCB1. As shown in the drawing,employ as the flat cables FC those which are each comprised of aplurality of lead lines (each made of Sn-metallized phosphor bronze)that are sandwiched between and supported by a stripe-shapedpolyethylene layer and polyvinyl alcohol later.

[0254] <<Connection Structure of TCP>>

[0255]FIG. 16 is a diagram showing a sectional structure of the tapecarrier package TCP wherein the integrated circuit chips CHIconstituting the scan signal driver circuit V and image signal drivercircuit H are mounted on a flexible printed circuit board; FIG. 17 is amain-part sectional diagram showing the state of connecting them to thescan signal circuit terminals GTM of the liquid crystal display panel inthis embodiment.

[0256] In the drawings, TTB is an input terminal/lead section ofintegrated circuit CHI; TTM is an output terminal/lead section ofintegrated circuit CHI—for example, these are made of Cu, and bondingpads PAD of integrated circuits CHI are connected by so-called face-downbonding methods to respective inside distal end portions (generallycalled “inner leads”). Outside distal end portions of terminals TTB, TTM(generally called “outer leads”) correspond to inputs and outputs ofsemiconductor integrated circuit chips CHI respectively, which areconnected by soldering or the like to CRT/TFT converter circuit/powersupply circuit SUP and are connected by an anisotropic conductive filmACF to the liquid crystal display panel PNL. The package TCP has itsdistal end portion which is connected to the panel in such a way as tocover the protective film PSV1 that exposes the connection terminals GTMon the panel PNL side; thus, the external connection terminals GTM (DTM)are covered with at least one of the protective film PSV1 and thepackage TCP to thereby increase durability against electrolyticcorrosion.

[0257] BF1 is a base film made of polyimide or the like; SRS is a solderresist film for masking to prevent a solder from adhering to unwantedextra portions during soldering processes. A gap space between the upperand lower glass substrates outside of the seal pattern SL is protectedby an epoxy resin EPX or else after having effected cleaning treatment,wherein a silicon resin SIL is further filled between the package TCPand the upper-side substrate SUB2 for multiplexing of protection.

[0258] <<Driver Circuit Board PCB2>>

[0259] A driver circuit board PCB2 is designed to mount thereonelectronics parts or components including ICs and capacitors as well asresistors or else. Also mounted on this driver circuit board PCB2 are apower supply circuit for obtaining a plurality of stabilized voltagesources as voltage-divided from a single voltage source along withcircuitry SUP that includes a circuit for converting information for CRT(cathode-ray tube) from the host (upper-level arithmetic processingdevice) into information for use with the TFT liquid crystal displaydevice. CJ is a connector connect section to which a connector, notshown, to be connected to the outside will be connected.

[0260] The driver circuit board PCB1 and driver circuit board PCB2 areelectrically connected together by one or more flat cables FC.

[0261] <<Overall Arrangement of Liquid Crystal Display Module>>

[0262]FIG. 18 is an explosive perspective view showing respectivecomponents or elements of a liquid crystal display module MDL.

[0263] SHD is a frame-like shield casing (metal frame) formed of a metalplate; LCW is its display window; PNL, a liquid crystal display panel;SPB, an optical diffusion plate; LCB, a photoconductor; RM, a reflectorplate; BL, a backlight fluorescent tube; LCA, a backlight casing,wherein respective members are laminated or stacked in the layoutrelationship shown in the drawing for assembly of the module MDL.

[0264] The module MDL is arranged so that the entire is fixed by morethan one nail-and-hook combination as provided at the shield case SHD.

[0265] The backlight case LCA has its shape that permits internalreceival of the backlight fluorescent tube BL and optical diffusionplate SPB plus photoconductor LCB as well as reflector plate RM, therebyconverting by the photoconductor LCB and reflector plate RM plus opticaldiffusion plate SPB the light from the backlight fluorescent tube BL asdisposed along the lateral plane of the photoconductor LCB into uniformor coherent backlight on the display plane for outward projection towardthe side of the liquid crystal display panel PNL.

[0266] The backlight fluorescent tube BL is operatively associated withan inverter circuit board PCB3 as connected thereto thus providing apower supply of the backlight fluorescent tube BL.

[0267] As apparent from the foregoing, in this embodiment, making thepixel electrodes transparent enables the maximum optical transmissivityto improve by approximately 30% (31.8% in this embodiment) duringperforming white displaying.

[0268] More practically, with this embodiment, the opticaltransmissivity was improved from approximately 3.8% obtained whenemploying opaque pixel electrodes up to about 5.0% as a result ofemployment of transparent pixel electrodes.

[0269] Additionally, it becomes possible to simultaneously fabricate theITO film for improvement of reliability of elements concerned, which inturn makes it possible to achieve both the reliability and theproductivity at a time.

[0270] (Embodiment 2)

[0271] This embodiment is identically the same as the embodiment 1stated above except for the following points. A plan view diagram ofpixels is shown in FIG. 20. Hatched portions in the drawing designate atransparent conductive film g2.

[0272] <<Pixel Electrode PX>>

[0273] In this embodiment the pixel electrode PX is constituted from asecond conductive film d2 that is the same in layer as the sourceelectrode SD1 and drain electrode SD2, and a third conductive layer d3.In addition, the pixel electrode PX is formed integrally with the sourceelectrode SD1.

[0274] <<Counter Electrode CT>>

[0275] In this embodiment the counter electrode CT is comprised of atransparent conductive film g2. This transparent conductive film g2 ismade of a sputtering-fabricated transparent conductive film(Indium-Tin-Oxide ITO: Nesa film) as in the embodiment 1, and is formedto a thickness ranging from 100 to 2,000Å (in this embodiment, a filmthickness of about 1,400Å).

[0276] <<Contravoltage Signal Line CL>>

[0277] The contravoltage signal line CL is arranged by a transparentconductive film g2, and is designed so that it is integral with thecounter electrode CT.

[0278] <<Gate Terminal Section>>

[0279] In this embodiment the transparent conductive layer g2 forprotection of the surface of an Al layer g1 of gate terminal GTM whileimproving the reliability of connection with TCP (Tape Carrier Packegeis formed at the same step of the counter electrode CT. The arrangementis identically the same as that of embodiment 1, and is as shown inFIGS. 7A, B.

[0280] <<Drain Terminal DTM>>

[0281] In this embodiment the transparent conductive layer g2 of drainconnection terminals DTM is made of a transparent conductive film ITOthat was formed simultaneously during formation of counter electrodesCT, as in the case of the gate terminals GTM. While the arrangement isslightly different from embodiment 1 in the up/down relationship oflayers involved, such difference is not essential and for this reasonits illustration is eliminated herein.

[0282] <<Counter Electrode Terminal CTM>>

[0283] The transparent conductive layer g2 overlying the conductivelayer g1 of counter electrode terminals CTM is comprised of atransparent conductive film ITO that was formed at the same process stepof forming counter electrodes CT, in a way similar to that of otherterminals. The arrangement is no longer dissimilar to that of embodiment1, and is as shown in FIGS. 9A, B.

[0284] <<Manufacturing Method>>

[0285] In this embodiment the process order is such that the step F isbetween the step B and step C of the embodiment 1. For the order ofprocesses, the process order of from FIG. 12 to FIG. 15 becomes theorder of A→B→F→C→D→E→G→H. The mask pattern is such that the scan signalline GL, scan electrode GT and contravoltage signal line CL areseparated while a pattern of the transparent conductive layer g2 of eachterminal and a pattern of the contravoltage signal line CL are formed inthe same mask.

[0286] With such an arrangement, letting the counter electrode betransparent makes it possible to improve the maximum transmissivity byabout 16% (in this embodiment 15.9%), which in turn permits thetransmissivity of the liquid crystal display panel PNL to become 4.4%,or more or less.

[0287] (Embodiment 3)

[0288] This embodiment is the same as the embodiment 1 and embodiment 2except for the following points. A plan view diagram of pixels is shownin FIG. 21. Hatched portions in the drawing indicate a transparentconductive film g2.

[0289] <<Counter Electrode CT>>

[0290] In this embodiment the counter electrode CT is comprised of atransparent conductive film g2. This transparent conductive film g2 ismade of a sputtering-fabricated transparent conductive film(Indium-Tin-Oxide ITO: Nesa film) as in the embodiment 1, and is formedto a thickness of from 100 to 2,000Å (in this embodiment, a filmthickness of about 1,400Å).

[0291] <<Contravoltage Signal Line CL>>

[0292] The contravoltage signal line CL is arranged by a transparentconductive film g2, and is designed so that it is integral with thecounter electrode CT.

[0293] <<Manufacturing Method>>

[0294] In this embodiment the order of process steps is such that thestep F is added between the step B and step C of embodiment 1. For theorder of processes, the process order of from FIG. 12 to FIG. 15 becomesthe order of A→B→F→C→D→E→F→G→H. The mask pattern is such that a patternof the scan signal line GL and scan electrode GT and that of thecontravoltage signal line CL are formed in independent masks.

[0295] With this embodiment, letting both the pixel electrode and thecounter electrode be transparent makes it possible to further improvethe maximum transmissivity during white displaying by about 50% (in thisembodiment 47.7%) beyond the embodiment 1 or embodiment 2, resulting inthe liquid crystal display panel PNL being about 5.6% in transmissivity.

[0296] (Embodiment 4)

[0297] This embodiment is the same as the embodiment 1 and embodiment 3except for the following points. A plan view diagram of pixels is shownin FIG. 22. Hatched portions in the drawing indicate a transparentconductive film g2.

[0298] <<Contravoltage Signal Line CL>>

[0299] The contravoltage signal line CL is comprised of a conductivetransparent film g1. In this embodiment, Cr is used for the conductivefilm g1. Additionally, in order to connect between the contravoltagesignal line CL and the counter electrode CT, anodization is not carriedout. In addition, a through-hole PH is formed in the gate insulationfilm GI. In addition, the conductive film g1 may be made from Ta, Ti,Mo, W, Al or an alloy thereof other than Cr, or alternatively formed ofa clad structure including a lamination of them.

[0300] <<Manufacturing Method>>

[0301] In this embodiment the step B of the embodiment 1 is deleted. Inaddition, the through-hole PH is formed at the step E while forming boththe pixel electrode PX and the counter electrode CT simultaneously usingthe same mask.

[0302] In this embodiment, in addition to the effects of the embodiment1 and embodiment 3, reducing the resistivity of the contravoltage signalline CL makes smooth the transmission of a voltage between counterelectrodes; reducing voltage distortion makes it possible to suppresscrosstalk (lateral smear) occurring in the horizontal direction.

[0303] In addition, forming the pixel electrode PX and counter electrodeCT simultaneously using the same mask permits the step F as performedtwo times in the embodiment 4 to be formulated into a single timethereby improving the productivity also.

[0304] (Embodiment 5)

[0305] This embodiment is the same as the embodiment 1 and embodiment 4except for the following points. A plan view diagram of pixels is shownin FIG. 23. Hatched portions in the drawing indicate a transparentconductive film g2.

[0306] <<Counter Electrode CT>>

[0307] In this embodiment, only the central counter electrode CT is madeof a transparent conductive film g2. Those counter electrodes thatneighbor image signal lines are each formed of a metal film in a wayintegral with contravoltage signal lines.

[0308] In this embodiment, in addition to the effects of the embodiment1 and embodiment 4, it becomes possible by making opaque the counterelectrodes neighboring the image signal lines to suppress crosstalkassociated with image signals. The reason for this is as indicated inthe section of the operation.

[0309] (Embodiment 6)

[0310] A respective one of the embodiments 2 and 3 is such that both thecounter electrode signal line CL and the counter electrode CT are formedof the transparent conductive layer g2.

[0311] In this case, this embodiment is aimed at significant reductionof the resistance value of the counter electrode signal line CL byemploying an arrangement shown in FIGS. 24A-C.

[0312]FIG. 24A is a plan view diagram showing part of the counterelectrode signal line CL of FIG. 20, whist FIG. 24B is a sectionaldiagram at line b-b of the same drawing, FIG. 24A.

[0313] In the drawing, a difference from FIG. 20 is that the counterelectrode signal line CL consists of a double-layer structure, whereinan Al layer 10 that is less in resistance value is formed as its lowerlayer with an ITO film 11 formed overlying this Al layer 10 so that itcompletely cover the Al layer 10. And, the counter electrode CT isconstituted from an extension portion resulted from letting part of saidITO film 11 extend.

[0314] With such an arrangement, it is possible to achieve reduction ofresistivity of the counter electrode signal line CL while at the sametime preventing electrical shortcircuiting between it and anotherconductive layer (e.g. image signal line DL) through an interlayerdielectric film due to the presence of a beard-like projection, calledwhisker, which occurs in the Al layer 10.

[0315] More specifically, while it has been known that the Al layer 10would experience generation of a whisker during fabrication of theinterlayer dielectric film overlying the layer with respect to the imagesignal line DL resulting in creation of the harmful effect stated above,it has been affirmed that such whisker production will no longer takeplace when forming the ITO film to completely cover this Al layer 10.

[0316] Furthermore, FIG. 24C is the one in which the counter electrodeCT is constituted from a double or duplex lead—in this embodiment, alead of an ITO film 11 is formed covering a lead of Al layer 10. Becausethe vicinity of the center line of such lead is low in transmissivityeven where a voltage is applied between electrodes, any aperture ratioreduction will hardly occur even where an opaque metal lead is disposedas in this example.

[0317] By employing the duplex lead for either the counter electrode orthe pixel electrode, it is possible to greatly suppress opencircuitdefects of electrodes which will become problematic in large-sizescreens.

[0318] (Embodiment 7)

[0319] <<Active-Matrix Liquid Crystal Display Device>>

[0320] An explanation will be given of an embodiment which applies thepresent invention to an active-matrix color liquid crystal displaydevice. Note here that in the drawings to be explained below, thosehaving the same functions are adhered with the same referencecharacters, and any repetitive explanation will be eliminated.

[0321] <<Planar Arrangement of Matrix Section (Pixel Section)>>

[0322]FIG. 25 is a plan view diagram showing one pixel along with itsnearby portion of the active-matrix color liquid crystal display deviceof the present invention. (Hatched portions in the drawing indicates atransparent conductive film i1.)

[0323] As shown in FIG. 25, each pixel is disposed within a crossover orintersection region (within a region as surrounded by four signal lines)of a scan signal line (gate signal line or horizontal signal line) GL, acontravoltage signal line (counter electrode lead) CL, and twoneighboring image signal lines (drain signal lines or vertical signallines) DL. Each pixel includes a thin-film transistor TFT, storagecapacitor Cstg, pixel electrode PX, and counter electrode CT. The scansignal line GL and contravoltage signal line CL extend laterally in thedrawing, and a plurality of similar lines are disposed in the up/downdirection. The image signal line DL extends in the up/down direction,and plural similar lines are disposed in the lateral direction. Thepixel electrode PX is formed of a transparent conductive film i1 and iselectrically connected to the thin-film transistor TFT via a sourceelectrode SD1; the counter electrode CT also is formed of thetransparent conductive film i1 and is electrically connected to thecontravoltage signal line CL.

[0324] The pixel electrode PX and the counter electrode CT are designedto oppose each other for control of the optical state of a liquidcrystal LC by using an electric field between each pixel electrode PXand counter electrode CT to thereby control displaying. The pixelelectrode PX and counter electrode are arranged in a comb-like shape,each of which becomes an elongate electrode in the up/down direction ofthe drawing.

[0325] The line number O of counter electrodes CT within a single pixelis designed so that it has the relation of O=P+1 with no exceptions withrespect to the line number (number of comb teeth) of pixel electrodes PX(in this embodiment, O=3, and P=2). This setup is in order toalternately dispose the counter electrodes CT and pixel electrodes PXand also force a counter electrode CT to neighbor an image signal lineDL with no exceptions. Whereby, it becomes possible for the counterelectrode CT to shield electric flux lines from such image signal lineDL to ensure that an electric field between the counter electrode CT andpixel electrode PX receive no influence from an electric field createdfrom the image signal line DL. As counter electrodes CT are constantlysupplied with a voltage potential from the outside via contravoltagesignal lines CL to be described later, the potential remains stabilized.Due to this, even when adjacent to the image signal line DL, anypotential variation hardly occurs. In addition, due to this, thegeometric position of the pixel electrode PX becomes far from the imagesignal line DL; therefore, any possible parasitic capacitance betweenthe pixel electrode PX and image signal line DL decreases significantly,thereby also enabling suppression of variation of a pixel electrodepotential Vs due to an image signal voltage(s). These in turn make itpossible to suppress crosstalk (image quality defects called thelongitudinal smear) occurring in the up/down direction.

[0326] Let each pixel electrode PX and counter electrode CT be 6 μm inelectrode width. This is in view of the fact that a sufficiently largervalue than the thickness, 3.9 μm, of a liquid crystal layer to be laterdescribed is set in order to apply a sufficient electric field to theentire liquid crystal layer with respect to the thickness direction ofthe liquid crystal layer while letting it be as fine as possible inorder to enlarge the aperture ratio. In addition, let the electrodewidth of image signal lines DL be 8 μm, which is slightly wider thanthat of pixel electrodes PX and counter electrodes CT in order toprevent opencircuiting. Here, set the electrode width of image signallines DL at a specified value that is less than or equal to twice theelectrode width of the neighboring counter electrode CT. Alternatively,in cases where the electrode width of image signal lines DL wasdetermined from the productivity of the yield, let the electrode widthof counter electrodes CT that neighbor image signal lines DL be greaterthan or equal to half of the electrode width of image signal lines DL.This is in order to allow the both-side counter electrodes CT to absorbelectric flux lines generated from image signal lines DL respectively:For well absorption of electric flux lines produced from a certainelectrode width, it is required to use an electrode that has itselectrode width equal to or wider than the width. Accordingly, by takinginto consideration that the both-side counter electrodes CT may absorbthose electric flux lines generated from half (4 μm for each) of theelectrode of an image signal line DL respectively, let the electrodewidth of a counter electrode CT neighboring upon an image signal line DLbe greater than or equal to ½. This eliminates generation of crosstalkdue to influence of image signals—in particular, the up/down direction(longitudinal crosstalk).

[0327] Scan signal lines GL are designed to have an electrode width asset to satisfy the resistance value that permits a scanning voltage tobe sufficiently applied to the gate electrode GT of a pixel on theterminate end side (on the opposite side of a scan electrode terminalGTM to be described later). Regarding contravoltage signal lines CLalso, set the electrode width to satisfy the resistance value thatpermits a contravoltage to be sufficiently applied to the counterelectrode CT of a terminate-end pixel (a pixel farthest from common buslines CB1 and CB2 to be later described, i.e. a pixel lying midwaybetween CB1 and CB2).

[0328] On the other hand, the electrode distance between a pixelelectrode PX and counter electrode CT is varied with a liquid crystalmaterial used. This is in order to guarantee that in view of the factthat the electric field intensity for achievement of the maximumtransmissivity is different for different liquid crystal materials, thesetup of the electrode distance as per a liquid crystal material letsthe maximum transmissivity be obtainable within the range of the maximalamplitude of a signal voltage as set by the withstanding voltage of animage signal drive circuit used (signal-side driver). When using aliquid crystal display material to be described layer, the electrodedistance becomes 16 μm.

[0329] <<Sectional Structure of Matrix Section (Pixel Section)>>

[0330]FIG. 26 is a sectional diagram at cut line 6-6 of FIG. 25; FIG. 27is a sectional diagram of a thin-film transistor TFT at line 7-7 of FIG.25; and, FIG. 28 is a sectional diagram of a storage capacitor Cstg atline 8-8 of FIG. 25.

[0331] As shown in FIG. 26 to FIG. 28, a thin-film transistor TFT andstorage capacitor Cstg plus electrode group are formed on the side ofthe lower transparent glass substrate SUB1 with a liquid crystal layerLC being as a reference, whereas a color filter FIL and optical shieldblack matrix pattern BM are formed on the side of the upper transparentglass substrate SUB2.

[0332] In addition, alignment films ORI, ORI2 for controlling theinitial alignment of liquid crystal are provided on the inside (liquidcrystal LC side) surfaces of the transparent glass substrates SUB1,SUB2, respectively, whereas polarizer plates (Cross Nicol layout) withpolarization axes laid out at right angles to each other are provided onthe outer surfaces of the transparent glass substrates SUB1, SUB2,respectively.

[0333] <<TFT Substrate>>

[0334] A detailed explanation will first be given of an arrangement onthe side of the lower transparent glass substrate SUB1 (TFT substrate).

[0335] <<Thin-Film Transistor TFT>>

[0336] A thin-film transistor TFT operates in a way such that uponapplication of a positive bias to its gate electrode GT, the channelresistance between the source and drain decreases; in the absence of anybiassing thereto, the channel resistance increases.

[0337] As shown in FIG. 27, the thin-film transistor TFT has a gateelectrode GT, gate insulation film GI, i-type semiconductor layer ASmade of i-type (intrinsic: without doping any impurity for determiningthe conductivity type) amorphous silicon (Si), and a pair of a sourceelectrode SD1 and drain electrode SD2. Additionally, in view of the factthat the source and drain are inherently determinable by a bias polaritytherebetween and that in circuitry of this liquid crystal display deviceits polarity will be inverted during operations, it would be understoodthat the source and drain are interchangeable during operations.However, in the explanation below, one of them will be fixedly referredto as the “source” whereas the other as “drain” for purposes ofconvenience only.

[0338] <<Gate Electrode GT>>

[0339] The gate electrode GT is formed to be continuous with a scansignal line GL, wherein a partial region of the scan signal line GL isarranged to become the gate electrode GT. The gate electrode GT is thepart that is beyond the active regions of the thin-film transistor TFT.In this embodiment the gate electrode GT is formed of a single-layerconductive film g3. The conductive film g3 may be a sputter-fabricatedchromium-molybdenum alloy (Cr—Mo) film, although not exclusively limitedthereto.

[0340] <<Scan Signal Line GL>>

[0341] The scan signal line GL is formed of a conductive film g3. Thisconductive film g3 of the scan signal line GL is fabricated at the sameprocess step of the conductive film g3 of the gate electrode GT so thatthese are formed integrally with each other. This scan signal line GLpermits supplement of a gate voltage Vg from external circuitry to thegate electrode GT. In this example the conductive film g3 may be asputter-fabricated chromium-molybdenum alloy (Cr—Mo) film. Note that thescan signal line GL and gate electrode GT should not be limited only tothe chromium-molybdenum alloy; for example, these may be designed tohave a double-layered structure of aluminum or aluminum alloy as wrappedby chromium-molybdenum for resistivity reduction. Furthermore, itscrossover portion with an image signal line DL may be made fine in orderto reduce the possibility of shortcircuiting with the image signal lineDL; alternatively, a crotch or Y-bent configuration may be employed inorder to enable cutaway separation by laser trimming even uponoccurrence of shortcircuiting.

[0342] <<Contravoltage Signal Line CL>>

[0343] The contravoltage signal line CL is formed of a conductive filmg3. This contravoltage signal line CL's conductive film g3 is formed atthe same process step of the conductive film g3 of gate electrode GT andscan signal line GL plus counter electrode CT, and is arranged to beable to offer electrical connectivity to the counter electrode CT. Thiscontravoltage signal line CL is for supplying a contravoltage Vcom fromexternal circuitry to the counter electrode CT.

[0344] In addition, the contravoltage signal line CL should not belimited to chromium-molybdenum alloys only; for example, it may bedesigned to have a double-layered structure of aluminum or aluminumalloy wrapped by chromium-molybdenum for resistivity reduction.

[0345] Furthermore, its crossover portion with an image signal line DLmay be made thinner in order to reduce the possibility ofshortcircuiting with the image signal line DL; alternatively, a crotchor Y-bent configuration may be employed in order to enable cutawayseparation by laser trimming even upon occurrence of shortcircuiting.

[0346] <<Dielectric Film GI>>

[0347] The dielectric film GI is for use as a gate insulation film forgiving an electric field to the semiconductor layer AS along with thegate electrode GT at the thin-film transistor TFT. The dielectric filmGI is formed overlying the gate electrode GT and scan signal line GL. Asthe dielectric film GI, a silicon nitride film is chosen which wasformed by plasma CVD for example to a thickness ranging from 2,500 to4,500Å (in this embodiment, about 3,500Å). The dielectric film GI alsofunctions as an interlayer dielectric film between the scan signal lineGL and contravoltage signal line CL on one hand and the image signalline DL on the other hand to thereby contribute to electrical isolationof them. In addition, the dielectric film GI is patterned forall-at-a-time fabrication by using the same photomask as that for aprotective film PSV1 to be later described.

[0348] <<i-Type Semiconductor Layer AS>>

[0349] The i-type semiconductor layer AS is amorphous silicon and isformed to a thickness of from 200 to 2,500Å (about 1,200Å in thisembodiment).

[0350] A layer d0 is an N(+) type amorphous silicon semiconductor layerwith phosphorus (P) doped therein for ohmic contact, which is left onlyat a portion whereat i-type semiconductor layer AS is present on thelower side whereas a conductive layer d3 exists on the upper sidethereof.

[0351] The i-type semiconductor layer AS and layer d0 are also providedbetween the both of intersections (crossover sections) of the scansignal line GL and contravoltage signal line CL with respect to theimage signal line DL. The i-type semiconductor layer AS at theseintersections suppresses shortcircuiting between the scan signal line GLand contravoltage signal line CL and the image signal line DL at suchcross points.

[0352] <<Source Electrode SD1, Drain Electrode SD2>>

[0353] Each of the source electrode SD1 and drain electrode SD2 isconstituted from a conductive film d3 contacted with the N(+) typesemiconductor layer d0.

[0354] The conductive film d3 may be a chromium-molybdenum alloy (Cr—Mo)film that is formed by sputtering to a thickness of from 500 to 3,000Å(about 2,500Å in this embodiment). As the Cr—Mo film is inherently lowin stress, a film thickness can be formed comparatively thickly, whichin turn contributes to achievement of low resistivity of leads. TheCr—Mo film is also excellent in adhesiveness with the N(+) typesemiconductor layer d0. The conductive film d3 may be formed of ahigh-melting-point metal (Mo, Ti, Ta, W) film or high-melting-pointmetal silicide (MoSi₂, TiSi₂, TaSi₂, WSi₂) film in place of the Cr—Mofilm; still alternatively, it may be designed to have a multilayerstructure with aluminum or the like.

[0355] After having patterned the conductive film d3 using a maskpattern, the conductive film d3 is used as a mask to remove the N(+)type semiconductor layer d0. In other words, specified portions of theN(+) type semiconductor layer d0 residing on the i-type semiconductorlayer AS which exclude those at the conductive film d1 and conductivefilm d2 are removed away in a self-align fashion. At this time, sincethe N(+) type semiconductor layer d0 is etched so that all portionscorresponding to its thickness are removed away, the i-typesemiconductor layer AS will also be slightly etched away at its surfaceportion; however, such extent may be controlled by adjustment of theetching time.

[0356] <<Image Signal Line DL>>

[0357] The image signal line DL is comprised of a conductive film d3that is at the same layer of the source electrode SD1 and drainelectrode SD2. In addition, the image signal line DL is formedintegrally with the drain electrode SD2. In this example the conductivefilm d3 may be a chromium-molybdenum alloy (Cr—Mo) film that is formedby sputtering to a thickness of from 500 to 3,000Å (about 2,500Å in thisembodiment). As the Cr—Mo film is low in stress, a film thickness can beformed comparatively thickly, which in turn contributes to achievementof low resistivity of leads. The Cr—Mo film is also excellent inadhesiveness with the N(+) type semiconductor layer d0. The conductivefilm d3 may be formed of a high-melting-point metal (Mo, Ti, Ta, W) filmor high-melting-point metal silicide (MoSi₂, TiSi₂, TaSi₂, WSi₂) film inthe alternative of the Cr—Mo film, and still alternatively, designed tohave a multilayer structure with aluminum or the like.

[0358] <<Storage Capacitor Cstg>>

[0359] The conductive film d3 is formed to overlap the contravoltagesignal line CL at a source electrode SD2 portion of a thin-filmtransistor TFT. As apparent from FIG. 28 also, this overlappingconstitutes a storage capacitor (electrolytic capacitive element) Cstgwith the source electrode SD2 (d3) as its one electrode and with thecontravoltage signal CL as its remaining electrode. This storagecapacitor Cstg's dielectric film is formed of the dielectric film GIthat is used as the gate insulation film of the thin-film transistorTFT.

[0360] As shown in FIG. 25, when looking at planarly, the storagecapacitor Cstg is formed at part of the contravoltage signal line CL.

[0361] <<Protective Film PSV1>>

[0362] A protective film PSV1 is provided overlying the thin-filmtransistor TFT. The protective film PSV1 is formed to mainly protect thethin-film transistor TFT from humidity or the like, wherein the one thatis high in transparency and good in moisture vapor resistance is used.The protective film PSV1 is made of a silicon oxide film or siliconnitride film as fabricated by plasma CVD apparatus, for example, to afilm thickness ranging from 0.3 to 1 μm or therearound.

[0363] The protective film PSV1 has been removed to expose the externalconnection terminals DTM, GTM. With regard to a relation of thicknessesof the protective film PSV1 and gate insulation film GI, the former ismade thick in light of the protection effect whereas the latter isrendered thinner in mutual conductance of transistor. In addition, theprotective film PSV1 is patterned for simultaneous fabrication by use ofthe same photomask as that for the dielectric film GI. In addition,through-holes TH2 and TH1 are provided at a pixel section, forelectrical connection between the contravoltage signal line CL and acounter electrode CT to be later discussed and also for electricalconnection between the source electrode SD2 and pixel electrode PX. Atthe through-hole TH2, a hole is defined extending to the g3 layer due tosimultaneous fabrication of the protective film PSV1 and dielectric filmGI; at the through-hole TH1, a hole is defined reaching the d3 layer dueto blocking by d3.

[0364] <<Pixel Electrode PX>>

[0365] The pixel electrode PX is formed of a transparent conductivelayer i1. This transparent conductive film i1 is made of a transparentconductive film (Indium-Tin-Oxide ITO: Nesa film) as formed bysputtering to a thickness of 100 to 2,000Å (in this embodiment, about1,400Å). In addition, the pixel electrode PX is connected via thethrough-hole TH1 to the source electrode SD2.

[0366] The pixel electrode's becoming transparent as in this embodimentleads to improvement of the maximum optical transmissivity whenperforming white displaying due to rays of light passing through suchportion; thus, it becomes possible to perform brighter displaying thanin the case of using opaque pixel electrodes. At this time, as will bedescribed later, the polarizer plate layout is arranged (in thenormally-black mode) so that liquid crystal molecules retain theirinitial alignment state in the absence of a voltage applied thereto toachieve black displaying under such condition; consequently, even wherepixel electrodes are made transparent, no light rays penetrate suchportions to thereby enable displaying of black with good quality. Thisin turn makes it possible to improve the maximum transmissivity whileachieving sufficient contrast ratio.

[0367] <<Counter Electrode CT>>

[0368] The counter electrode CT is formed of a transparent conductivelayer i1. This transparent conductive film i1 is made of a transparentconductive film (Indium-Tin-Oxide ITO: Nesa film) as formed bysputtering to a thickness of 100 to 2,000Å (in this embodiment, about1,400Å). In addition, the counter electrode CT is connected via thethrough-hole TH2 to the contravoltage signal line CL.

[0369] The counter electrode CT is arranged so that a contravoltage Vcomis applied thereto. In this embodiment the contravoltage Vcom is set ata selected potential level which is lower by a specified degree than anintermediate DC voltage potential that is midway between the minimumlevel of drive voltage Vdmin and maximum level of drive voltage Vdmax asapplied to the image signal line DL, which degree corresponding to afeed-through voltage ΔVs as generated when turning off the thin-filmtransistor TFT, although an AC voltage may alternatively be appliedthereto in cases where it is required that the power supply voltage ofan integrated circuit for use in image signal drive circuitry be reducedin potential down at the half thereof.

[0370] <<Color Filter Substrate>>

[0371] Next, turning back to FIG. 25, FIG. 26, a detailed explanationwill be given of an arrangement of the side of the upper transparentglass substrate SUB2 (color filter substrate).

[0372] <<Optical Shield Film BM>>

[0373] An optical shield film BM (so-called black matrix) is formed onthe side of the upper transparent glass substrate SUB2 for preventingreduction of the contrast ratio or the like which otherwise occurs dueto outward emission of transmission light from unnecessary gaps (gapsother than that between the pixel electrode PX and counter electrode CT)toward the display plane side. The optical shield film BM also functionsto prevent either external light or backlight rays from falling onto thei-type semiconductor layer AS. More specifically, the i-typesemiconductor layer AS of the thin-film transistor TFT is sandwiched bythe optical shield film BM and the gate electrode GT of relatively largesize which are at the upper and lower locations to thereby eliminatehitting of externally incoming natural light and backlight rays.

[0374] The optical shield film BM shown in FIG. 25 is arranged so thatit linearly extends along the lateral direction over the thin-filmtransistor TFT. This pattern is one example; alternatively, it may bedesigned into a matrix form with openings defined like holes. At certainportions at which the electric field direction is disturbed such ascomb-shaped electrode ends or else, display at such portions is inone-to-one correspondence to image information within pixels so thatblack is obtained in the case of black and white for white; accordingly,such can be utilized as part of such display. In addition, a gap betweenthe counter electrode CT and image signal line DL in the up/downdirection of the drawing is optically shielded by a light shield layerSH that was formed at the same process step of the gate electrode GT.Whereby, the up/down-directional light shielding in the right/left orlateral direction can be optically shielded at high accuracy equivalentto the alignment accuracy of TFT processes, which in turn makes itpossible to establish a boundary of the light shield layer SH betweenelectrodes of counter electrodes CT that neighbor image signal lines DLthereby enabling further enlargement of the opening as compared to thecase of optical shielding due to the optical shield film BM that dependson the positional alignment accuracy of the upper and lower substrates.

[0375] The optical shield film BM has the shielding effect with respectto light, and is formed of a highly insulative film for elimination ofbad influence on an electric field between the pixel electrode PX andcounter electrode CT; in this embodiment, it is made of a resistmaterial mixed with black pigment as formed to a thickness of about 1.2μm.

[0376] The optical shield film BM is linearly formed in the lateraldirection with respect to those pixels in each row so that effectivedisplay regions at each row are partitioned by this line. Thus, thecontour line of each row pixel is made clear by the optical shield filmBM. In other words, the optical shield film BM functions as the blackmatrix while also functioning to optically shield the i-typesemiconductor layer AS.

[0377] The optical shield film BM is also formed at the periphery tohave a window frame-like shape, whose pattern is formed in a waycontinuous with the pattern of the matrix section shown in FIG. 25. Theoptical shield film BM at the periphery is extended to outside of a sealsection SL thereby preventing leakage light, such as reflection lightdue to practical mount equipment such as personal computers or else,from entering the matrix section, while at the same time preventing thelight such as backlight or else from leaking toward outside of thedisplay area. On the other hand, this optical shield film BM is limitedin location so that it resides within an inside area that is smaller byabout 0.3 to 1.0 mm than the edge of the substrate SUB2, and also isformed excluding cutaway regions of the substrate SUB2.

[0378] <<Color Filter FIL>>

[0379] Same as the embodiment 1.

[0380] <<Overcoat Film OC>>

[0381] Same as Embodiment 1.

[0382] <<Liquid Crystal layer, Alignment Film & Polarizer Plate>>

[0383] Same as Embodiment 1.

[0384] <<Configuration of Matrix Vicinity>>

[0385] Same as Embodiment 1.

[0386] <<Gate Terminal Section>>

[0387]FIG. 29A is a plan view diagram showing a connection structurefrom the display matrix's scan signal line GL up to its externalconnection terminal GTM, whist FIG. B shows a cross-section at cut lineB-B of FIG. 29A. Note that the same drawing corresponds to the FIG. 5right center vicinity, wherein hatched part is represented by onestraight line shape for purposes of convenience.

[0388] In the drawing the Cr—Mo layer g3 is hatched for clarity purposesonly.

[0389] The gate terminal GTM is comprised of the Cr—Mo layer g3 andfurther a transparent conductive layer i1 that is for protecting thesurface of it and for improving the reliability of connection with a TCP(Tape Carrier Package). This transparent conductive film i1 employs atransparent conductive film ITO that was formed at the same process stepof forming the pixel electrode PX.

[0390] In the plan view diagram, the dielectric film GI and protectivefilm PSV1 are formed on the right side of its boundary, wherein theterminal section GTM placed at the left end is arranged to be exposedfrom them for enabling electrical contact with external circuitry.Although in the drawing only one pair of the gate line GL and gateterminal is depicted, in the actual implementation, a plurality of suchline pairs are laid out in the up/down direction as shown in FIG. 29A toconstitute the terminal group Tg (FIG. 5), wherein the left end of thegate terminal is extended beyond the cutting region of the substrate tobe shortcircuited by a lead SHg (not shown) during manufacturingprocesses. This is useful for elimination of electrostatic breakdownduring rubbing of the alignment film ORI1 or the like.

[0391] <<Drain Terminal DTM>>

[0392]FIG. 30A shows a plan view diagram showing connection from theimage signal line DL to its external connection terminal DTM; FIG. 30Bshows a cross-section at cut line B-B of FIG. 30A. Note that the drawingcorresponds to the FIG. 5 upper right vicinity, and that although thedirection of the drawing is changed for convenience purposes, the rightend direction corresponds to the upper end of the substrate SUB1.

[0393] “TSTd” is a test terminal to which external circuitry is notconnected and which is widened to have a width greater than that of thelead section to thereby permit contacting of a probe needle or the like.Similarly, the drain terminal DTM also is widened to be wider in widththan the lead portion to enable connection with external circuitry.External connection drain terminals DTM are laid out in in the up/downdirection; as shown in FIG. 5, the drain terminals DTM constitute theterminal group Td (suffix eliminated) and are designed to further extendbeyond the cut line of the substrate SUB1, all of which areshortcircuited by a lead SHd (not shown) together during manufacturingprocesses for prevention of electrostatic breakdown. As shown in FIG. 8,test terminals TSTd are formed at alternate ones of the image signallines DL.

[0394] The drain connection terminal DTM is formed of a transparentconductive layer i1, and is connected to an image signal line DL atcertain part from which the protective film PSV1 is removed away. Thistransparent conductive film i1 makes use of a transparent conductivefilm ITO that was formed at the same process step of forming pixelelectrodes PX as in the case of the gate terminal GTM.

[0395] An extension lead from the matrix section up to the drainterminal section DTM is such that a layers d3 at the same level as theimage signal line DL is arranged.

[0396] <<Counter Electrode Terminal CTM>>

[0397]FIG. 31A shows a plan view diagram showing connection from thecontravoltage signal CL up to its external connection terminal CTM; FIG.31B shows a cross-section at cut line B-B of FIG. 31A. Note that thedrawing corresponds to the upper left part of FIG. 5 or therearound.

[0398] Respective contravoltage signal lines CL are bundled by a commonbus line CB to be drawn out toward the counter electrode terminal CTM.The common bus line CB is structured from a lamination of a conductivelayer 3 on the conductive layer g3 with the transparent conductive filmi1 electrically connecting between them. This is in order to reduce theresistivity of the common bus line CB to ensure that a contravoltage issufficiently supplied from external circuitry to each contravoltagesignal line CL. In the structure shown herein, a feature thereof lies inability to reduce the resistance of the common bus line without newlyloading any extra conductive layers.

[0399] The counter electrode terminal CTM is structured from theconductive layer g3 and the transparent conductive layer i1 as laminatedthereon. This transparent conductive film i1 employs a transparentconductive film ITO that was formed at the same process step of formingpixel electrodes PX, as in other terminals. The conductive layer g3 iscovered with the transparent conductive layer i1 excellent in durabilityin order to let the transparent conductive layer i1 protect its surfacefor elimination of electrolytic corrosion. In addition, connection ofthe transparent conductive layer i1 with the conductive layer g3 andconductive layer d3 is done by conduction via a through-hole(s) asformed in the protective film PSV1 and dielectric film GI.

[0400] On the other hand, FIG. 32A shows a plan view diagram showingconnection from another end of the contravoltage signal CL up to itsexternal connection terminal CTM2; FIG. 32B shows a sectional diagramtaken along line B-B of FIG. 32A. Note that the drawing corresponds tothe upper right part of FIG. 5 or therearound. Here, at the common busline CB2, the remaining ends (on the gate terminal GTM side) ofrespective contravoltage signal lines CL are bundled by to be drawn outtoward the counter electrode terminal CTM2. A difference from the commonbus line CB1 lies in forming by the conductive layer d3 and transparentconductive layer i1 for electrical insulation with the scan signal lineGL. In addition, electrical insulation with the scan signal line GL.

[0401] <<Display Device Overall Equivalent Circuit>>

[0402] An equivalent circuit of the display matrix section and itsperipheral circuit's connection diagram are shown in FIG. 33. Althoughthis drawing is a circuit diagram, it has been illustrated in a waycorresponding to the actual geometric layout. “AR” is a matrix arraywith a plurality of pixels laid out two-dimensionally.

[0403] In the drawing, “X” means image signal lines DL adhered withsuffices “G,” “B,” and “R” which stand for green, blue and red pixels,respectively. “Y” means scanning signal lines GL added with suffices 1,2, 3, . . . , “end” as per the order of sequence of the scan timing.

[0404] The scan signal lines Y (suffix eliminated) are connected to avertical scanning circuit V, whist the image signal lines X (suffixomitted) are coupled to an image signal driving circuit H.

[0405] “SUP” is circuitry that includes a power supply circuit forobtaining a plurality of stabilized voltage sources as voltage-dividedfrom a single voltage source along with a circuit or circuits forconversion of information for a CRT (cathode-ray tube) from a host(upper-level or “supervisory” arithmetic processing device) intoinformation for use with a TFT liquid crystal display device.

[0406] <<Driving Method>>

[0407] Several drive waveforms of the liquid crystal display device ofthis embodiment are shown in FIG. 34. Assume that a contravoltage Vc iskept constant in potential. A scan signal Vg takes the ON level once perscan period; during the remaining periods it is at the OFF level. Applyan image signal voltage in a way such that the positive polarity andnegative polarity are inverted once per frame for transmission to asingle pixel at an amplitude equal to twice a voltage as required to beapplied to the liquid crystal layer. Here, the image signal voltage Vdis inverted in polarity on a one-per-column basis; such polarityinversion is also done on a one-per-row basis. This results inachievement of an arrangement that lets polarity-inverted pixelsneighbor each other in the up/down and right/left directions, therebymaking it possible to cause flicker and crosstalk (smear) to hardlyoccur. In addition, the contravoltage Vc is set at a selected potentialthat is potentially lower by a predefined degree from the center voltageof polarity inversion of the image signal voltage. This is in order tocompensate for a feed-through voltage occurring when the thin-filmtransistor element is altered in state from the ON to OFF, and isperformed in order to apply to the liquid crystal an AC voltage of lessDC component. This is because upon application of DC, the liquid crystalmight suffer from severe afterimaging and degradation or the like.

[0408] In addition thereto, use of an AC voltage as the contravoltagemakes it possible to lower the maximum amplitude of an image signalvoltage, which in turn render permissible employment of image signaldrive circuits (signal-side drivers) that are low in withstandingvoltage.

[0409] <<How Storage capacitor Cstg Works>>

[0410] Same as Embodiment 1.

[0411] <<Manufacturing Method>>

[0412] An explanation will next be given of a manufacturing method ofthe substrate SUB1 side of the above-mentioned liquid crystal displaydevice with reference to FIG. 35 to FIG. 37. Note that in thesedrawings, the characters centrally indicated therein are process namesabbreviated, wherein a flow of fabrication process steps is shown whileindicating on its left side a cross-section of the thin-film transistorTFT part shown in FIG. 27 along with a cross-section at or near the gateterminal shown in FIG. 29 on the right side. Except for a process stepBand step D, step A-step I are partitioned in a way corresponding toeach photographic processing, wherein any one of such process stepsindicates the stage whereat the fabrication processing after thephotographic process has been completed with a photoresist removedalready. Note here that the term “photographic processing” as usedherein refers to a series of works covering from deposition of aphotoresist through selective exposure using a mask up to developmentthereof, and any repetitive explanation will be eliminated. Anexplanation below will be given in accordance with the process stepsthus partitioned.

[0413] Step A, FIG. 35

[0414] Provide by sputtering a conductive film g3 made of Cr—Mo or thelike on the lower transparent glass substrate SUB1 comprised of AN635glass (Trade Name), to a thickness of 2,000Å. After photographicprocessing, selectively etch the conductive film g3 by use of ammoniumcerium (IV) nitrate. Thus, form a gate electrodes GT, scan signal linesGL, contravoltage signal lines CL, gate terminals GTM, first conductivelayer of common bus lines CB1, first conductive layer of counterelectrode terminals CTM1, and more than one bus line SHg (not shown) forconnection of the gate terminals GTM.

[0415] Step B, FIG. 35

[0416] After having introduced into plasma CVD apparatus an ammonia gasand shiran gas plus nitrogen gas to provide a Si nitride film of 3,500Åthick and then having introduced into the plasma CVD apparatus a shirangas and hydrogen gas to provide an i-type amorphous Si film of 1,200Åthick, introduce a hydrogen gas and phosphine gas into the plasma CVDapparatus to thereby provide an N(+) type amorphous Si film to athickness of 300Å.

[0417] Step C, FIG. 35

[0418] After photographic processing, selectively etch the N(+)amorphous Si film and i-type amorphous Si film by using SF₆ and CCl₄ asdry etching gases to thereby form more than one island of i-typesemiconductor layer AS.

[0419] Step D, FIG. 36

[0420] Provide by sputtering a conductive film d3 made of Cr of 300Åthick. After photographic processing, use the same liquid as that usedat the step A to etch the conductive film d3 to thereby form imagesignal lines DL, source electrodes SD1, drain electrodes SD2, firstconductive layer of common bus lines CB2, and more than one bus line SHd(not shown) for shortcircuiting the drain terminals DTM. Next, introduceCCl₄ and SF₆ into the dry etching apparatus to etch the N(+) typeamorphous Si film for selective removal of an N(+) type semiconductorlayer d0 between the source and drain.

[0421] Step E, FIG. 36

[0422] Introduce into the plasma CVD apparatus an ammonia gas and shirangas plus nitrogen gas to provide a Si nitride film of 0.4 μm thick.After photographic processing, pattern a protective film PSV1 anddielectric film GI by selectively etching the Si nitride film by usingSF₆ as a dry etching gas.

[0423] Step F, FIG. 37

[0424] Provide by sputtering a transparent conductive film i1 made of anITO film of 1,400Å thick. After photographic processing, selectivelyetch the transparent conductive film i1 by using as etching liquid amixed acid liquid of hydrochloric acid and nitric acid, thereby formingthe uppermost layer of gate terminals GTM along with the secondconductive layer of drain terminals DTM and counter electrode terminalsCTM1 and CTM2.

[0425] <<Display Panel PNL & Driver Circuit Board PCB1>>

[0426] Same as Embodiment 1.

[0427] <<TCP's Connection Structure>>

[0428] Same as Embodiment 1.

[0429] <<Driver Circuit Board PCB2>>

[0430] Same as Embodiment 1.

[0431] <<Overall Arrangement of Liquid Crystal Display Module>>

[0432] Same as Embodiment 1.

[0433] As apparent from the foregoing, in this embodiment, making thecomb-shaped electrodes transparent in the same way as in the embodiment3 enables the maximum optical transmissivity to improve by about 50%during performing white displaying, while letting the liquid crystaldisplay panel PNL become about 5.7% in transmissivity.

[0434] In addition, it becomes possible to simultaneously fabricate theITO film for improvement of reliability of elements, which in turn makesit possible to achieve both the reliability and the productivity at atime.

[0435] A further advantage of this embodiment is that unlike theembodiments 1-6 above, the embodiment is designed to employ the processof forming an ITO overlying the protective film PSV, which in turn makesit possible to bring the counter electrode at the uppermost layer whileretaining good shield efficiency of leakage electric fields from imagesignal lines with crosstalk reduced.

[0436] A still further advantage is that the absence of any protectivefilm PSV in the pathway of electric flux lines for driving liquidcrystals between electrodes leads to elimination of any possible voltagereduction at such protective film PSV, which in turn has enabled themaximal drive voltage value for liquid crystal drive to decrease inpotential from 7.5 Volt as in the embodiment 1 down to 5.0 Volt as inthis example.

[0437] With the scheme for driving liquid crystals by applying anelectric field extending in substantially parallel to the substratesurface, the protective film must enter two times the pathway ofelectric flux lines between electrodes so that the process required canbe simplified while improving productivity.

[0438] (Embodiment 8)

[0439] This embodiment is the same as the embodiment 7 except for thefollowing points. A plan view of pixels is shown in FIG. 38. Hatchedportions in the drawing designate a transparent conductive film i1.

[0440] <<Pixel Electrode PX>>

[0441] In this embodiment the pixel electrode PX is constituted from aconductive film d3 that is the same in layer as the source electrode SD1and drain electrode SD2. In addition, the pixel electrode PX is formedintegrally with the source electrode SD1.

[0442] With this embodiment, in addition to the effects of embodiment 1,it is possible to avoid contact defects between the pixel electrode PXand source electrode SD1 although this comes at the sacrifice of theoptical transmissivity. Another advantage is that since one of theelectrodes is covered with the dielectric film (protective film PSV1),the possibility that a DC current flows in liquid crystals in thepresence of alignment film defects decreases resulting in elimination ofliquid crystal deterioration or the like, thus improving thereliability.

[0443] (Embodiment 9)

[0444] This embodiment is the same as the embodiment 7 except for thefollowing points. A plan view of pixels is shown in FIG. 39. Hatchedportions in the drawing indicate a transparent conductive film i1.

[0445] <<Counter Electrode CT>>

[0446] In this embodiment the counter electrode CT is comprised of aconductive film g3 that is integral with the contravoltage signal lineCL.

[0447] With this embodiment, in addition to the effects of theembodiment 1, it is possible to avoid contact failures between thecounter electrode CT and contravoltage signal line CL although this doescome at the sacrifice of the transmissivity. Another advantage is thatsince one of the electrodes is covered with the dielectric film(protective film PSV1), the possibility that a DC current flows inliquid crystals in the presence of alignment film defects decreasesresulting in elimination of liquid crystal deterioration, therebyimproving the reliability.

[0448] (Embodiment 10)

[0449] This embodiment is the same as the embodiment 7 except for thefollowing points. A plan view of pixels is shown in FIG. 40. Hatchedportions in the drawing indicate a transparent conductive film i1.

[0450] <<Optical Shield Film BM>>

[0451] An optical shield film BM (so-called black matrix) is formed onthe side of the upper transparent glass substrate SUB2 for preventingreduction of the contrast ratio or the like which otherwise occurs dueto outward emission of transmission light from unnecessary gaps (gapsother than that between the pixel electrode PX and counter electrode CT)toward the display plane side. The optical shield film BM also functionsto prevent rays of either external light or backlight from falling ontothe i-type semiconductor layer AS. More specifically, the i-typesemiconductor layer AS of the thin-film transistor TFT is sandwiched bythe optical shield film BM and the gate electrode GT of larger sizewhich are at the upper and lower locations to thereby eliminate hittingof externally incoming natural light and backlight rays.

[0452] The optical shield film BM shown in FIG. 40 is arranged to extendin the up/down-and-right/left directions over the thin-film transistorTFT while having a matrix-like shape with holes defined at openings. Atcertain portions at which the electric field direction is disturbed suchas comb-shaped electrode ends or else, display at such portions is inone-to-one correspondence to image information within pixels so thatblack is obtained in the case of black and white for white; accordingly,such can be utilized as part of such display.

[0453] Another advantage of this embodiment is that unlike theembodiment 7, the optical shield film BM has a shielding ability againstlight rays, and is formed of a high-conductivity film to ensure that anyelectric field of/from image signal lines DL hardly affects the electricfield between the pixel electrode PX and counter electrode CT—in thisembodiment, it was comprised of a three-layered lamination structureconsisting of chromium oxide (CrO_(x)) and chromium nitride (CrN_(x))plus chromium (Cr), which structure is formed from the surface of theopposed substrate SUB1 to a thickness of about 0.2 μm. At this time thechromium oxide (CrO_(x)) is used to suppress reflection on the displayplane. Additionally, the chromium (Cr) is provided at the uppermostlayer of optical shield layer BM to permit external supplement of avoltage to the optical shield film BM.

[0454] The optical shield film BM is linearly formed in the right/leftdirection with respect to those pixels in each row so that effectivedisplay regions at each row are partitioned by this line. Thus, thecontour of each row pixel is made clear by the optical shield film BM.In other words, the optical shield film BM functions as the black matrixwhile simultaneously functioning to optically shield the i-typesemiconductor layer AS.

[0455] The optical shield film BM is also formed at the periphery into awindow frame-like shape, whose pattern is formed in a way continuouswith the pattern of the matrix section shown in FIG. 25. The opticalshield film BM at the periphery is extended to outside of a seal sectionSL thereby preventing leakage light, such as reflection light due topractical mount equipment such as personal computers or else, fromentering the matrix section, while at the same time preventing the lightsuch as backlight or else from leaking toward outside of the displayarea. On the other hand, this optical shield film BM is limited inlocation so that it resides within an inside area smaller by about 0.3to 1.0 mm than the edge of the substrate SUB2, and also is formedexcluding cutaway regions of the substrate SUB2.

[0456] <<Overcoat Film OC>>

[0457] Same as Embodiment 1. Note however that one or more through-holesmay be formed to enable a voltage potential to be given to the opticalshield film BM. It is preferable that as the voltage potential,connection be done to the contravoltage Vc.

[0458] An advantage of this embodiment is that in addition to theeffects of the embodiment 7, letting the optical shield film BM shieldany influence of electric fields from image signal lines DL prevents anelectric field from being affected between the pixel electrode PX andcounter electrode CT. This eliminates crosstalk with image signal linesDL, which in turn enables avoidance of comet-tail-like blurred on-screenimage quality defects (smear). Additionally, it is also possible todownsize the region for optically shielding by the light shield layer SHthe transparent counter electrodes CT as disposed on the opposite sidesof an image signal line DL, which in turn enables accomplishment ofhigher transmissivity.

[0459] (Embodiment 11)

[0460]FIG. 43 is a diagram showing principles of aperture ratioimprovement of an active-matrix color liquid crystal display device inaccordance with this embodiment, wherein FIG. 43A is a characteristicdiagram showing a potential distribution inside of a liquid crystallayer upon application of a voltage to electrodes, FIG. 43B is a planview diagram showing a realignment state of liquid crystal moleculesnear or around the center of the liquid crystal layer, FIG. 43C is acharacteristic diagram showing a rotation angle α of liquid crystalmolecules shown in FIG. 43B, and FIG. 43D is one example of acharacteristic diagram showing a distribution of transmissivity of lightpassing through the upper/lower polarizer plates and upper/lowersubstrates plus a liquid crystal layer on electrodes and betweenelectrodes.

[0461] Here, it is the same as the embodiment 7 except for the pointswhich follow.

[0462] In this embodiment, approximately 2×10⁻¹² N (Newton) was used asthe twist elastic modulus K2 of the liquid crystal layer.

[0463] When such relatively large value of for example 10×10⁻¹² N(Newton) is used as the twist elastic modulus K2, almost all of theliquid crystal molecules at the center over electrodes are kept at zeroin rotation angle α as shown in FIG. 41B, resulting in thetransmissivity at the center over such electrodes approximating a valueof dark display.

[0464] On the other hand, it has been found that in this embodiment theliquid crystal molecules at the center over electrodes also attempt torotate causing more than 50% of the average transmissivity of thetransmissivity of a portion “A” between electrodes to become theaverage-value transmissivity of the transmissivity at a portion “B” overelectrodes.

[0465] Consequently, the average transmissivity as a whole becomes theaverage-value transmissivity of the transmissivities at the portionsA+B, which is significantly increased.

[0466] [Industrial Applicability]

[0467] As has been described above, the present invention is applicableto liquid crystals or else and offers practical useabilities in theliquid crystal manufacturing industry.

1. An active matrix liquid crystal display device having a pixelelectrode and a counter electrode for causing an electric fieldcomponent extending approximately parallel to a substrate surfacebetween said pixel electrode and said counter electrode to controltwistable liquid crystal molecules of a liquid crystal layer to therebyperform displaying, characterized in that at least one of the pixelelectrode or the counter electrode is a transparent electrode, that aninitial alignment state of said twistable liquid crystal and apolarization axis of a polarizer plate are arranged to let said displaydevice increase in optical transmissivity with an increase in saidelectric field component, that the initial alignment state of saidtwistable liquid crystal layer when applying no electric fields theretois a homogeneous alignment state, that liquid crystal molecules betweensaid electrodes and over the electrode when applying an electric fieldthereto controllably rotate in a direction substantially parallel to thesubstrate surface, that a maximal value of said optical transmissivityis more than or equal to 4.0%, and that a view angle range of a contrastratio of more than or equal to 10 to 1 is within a range ofall-directional coverage as tilted by 40 degrees or more from a verticaldirection with respect to a display plane.
 2. An active matrix liquidcrystal display device having a pixel electrode and a counter electrodefor causing an electric field component extending substantially parallelto a substrate surface between said pixel electrode and said counterelectrode to control twistable liquid crystal molecules of a liquidcrystal layer to thereby perform displaying, characterized in that atleast one of the pixel electrode or the counter electrode is atransparent electrode, that an initial alignment state of said twistableliquid crystal and a polarization axis of a polarizer plate are arrangedto let said display device increase in optical transmissivity with anincrease in said electric field component, that the initial alignmentstate of said twistable liquid crystal layer when applying no electricfields thereto is a homogeneous alignment state, and that a twistelastic modulus is less than or equal to 10×10⁻¹² N (Newton).
 3. Anactive matrix liquid crystal display device having a pixel electrode anda counter electrode for causing an electric field component extendingapproximately parallel to a substrate surface between said pixelelectrode and said counter electrode to control twistable liquid crystalmolecules of a liquid crystal layer to thereby perform displaying,characterized in that at least one of the pixel electrode or the counterelectrode is a transparent electrode, that an initial alignment state ofsaid twistable liquid crystal and a polarization axis of a polarizerplate are arranged to let said display device increase in opticaltransmissivity with an increase in said electric field component, thatthe initial alignment state of said twistable liquid crystal layer whenapplying no electric fields thereto is a homogeneous alignment state,and that an initial pretilt angle of liquid crystal molecules at theupper and lower interfaces of the liquid crystal layer is less than orequal to 10 degrees whereas an initial tilt state of liquid crystalmolecules within the liquid crystal layer is in a spray state.
 4. Anactive matrix liquid crystal display device having a pixel electrode anda counter electrode for causing an electric field component extendingapproximately parallel to a substrate surface between said pixelelectrode and said counter electrode to control twistable liquid crystalmolecules of a liquid crystal layer to thereby perform displaying,characterized in that at least one of the pixel electrode or the counterelectrode is a transparent electrode, that an initial alignment state ofsaid twistable liquid crystal and a polarization axis of a polarizerplate are arranged to let said display device increase in opticaltransmissivity with an increase in said electric field component, thatthe initial alignment state of said twistable liquid crystal layer whenapplying no electric fields thereto is a homogeneous alignment state,and that an average tilt angle of liquid crystal molecules of the liquidcrystal layer on or over the transparent electrode is less than 45degrees even when applying an electric field thereto.
 5. The activematrix liquid crystal display device as recited in claim 2 ,characterized in that the twist elastic modulus of said liquid crystalis less than or equal to 5.1×10⁻¹² N (Newton).
 6. The active matrixliquid crystal display device as recited in claim 2 , characterized inthat the twist elastic modulus of said liquid crystal is less than orequal to 2×10⁻¹² N (Newton).
 7. The active matrix liquid crystal displaydevice as recited in claim 3 , characterized in that the initial pretiltangle of liquid crystal molecules at the upper and lower interfaces ofsaid twistable liquid crystal layer is less than or equal to 6 degrees.8. The active matrix liquid crystal display device as recited in claim 4, characterized in that the average tilt angle of liquid crystalmolecules on or over the transparent electrode of said twistable liquidcrystal layer is less than or equal to 30 degrees even upon applicationof an electric field.
 9. The active matrix liquid crystal display deviceas recited in claim 4 , characterized in that the average tilt angle ofliquid crystal molecules on or over the transparent electrode of saidtwistable liquid crystal layer is less than or equal to 10 degrees evenupon application of an electric field.
 10. The active matrix liquidcrystal display device as recited in any one of the preceding claims 1through 4, characterized in that either the pixel electrode or thecounter electrode is of a double structure of a transparent electrodeand an opaque electrode.
 11. The active matrix liquid crystal displaydevice as recited in any one of the preceding claims 1 to 4 ,characterized in that said active matrix liquid crystal display devicefurther has contra-voltage signal lines for electrical connectionbetween counter electrodes, and that two neighboring contra-voltagesignal lines are connected by a counter electrode via a through-hole.12. The active matrix liquid crystal display device as recited in anyone of claims 1 to 4 , characterized in that said active matrix liquidcrystal display device further has a protective film for coating activematrix elements, and that at least one of said pixel electrode or saidcounter electrode is formed on said protective film and is electricallyconnected via a through-hole formed in said protective film to either anactive matrix element or a contra-voltage signal line.
 13. The activematrix liquid crystal display device as recited in any one of claims 1to 4 , characterized in that the counter electrode is made of atransparent electrode, and by further having an optical shield patternbetween the counter electrode and an image signal line.
 14. The activematrix liquid crystal display device as recited in any one of claims 1to 4 , characterized in that said active matrix liquid crystal displaydevice further has a contravoltage signal line for electrical connectionbetween counter electrodes, and that said contra-voltage signal line ismade of metal.
 15. The active matrix liquid crystal display device asrecited in claim 11 , characterized in that said contra-voltage signalline is formed of metal.
 16. The active matrix liquid crystal displaydevice as recited in any one of claims 1 to 4 , characterized in thatsaid active matrix liquid crystal display device further has an imagesignal line and also has within one pixel more than three counterelectrodes including two counter electrodes neighboring image signallines, and that said counter electrodes neighboring the image signallines are opaque.
 17. The active matrix liquid crystal display device asrecited in any one of claims 1 to 4 , characterized in that atransparent conductive film of the transparent electrode isindium-tin-oxide (ITO).
 18. The active matrix liquid crystal displaydevice as recited in claim 14 or 15 , characterized in that thecontra-voltage signal line is formed of Cr, Ta, Ti, Mo, W, Al or analloy thereof or alternatively of a clad structure with these materialslaminated.
 19. The active matrix liquid crystal display device asrecited in claim 14 or 15 , characterized in that the contra-voltagesignal line is formed of a clad structure made of Cr, Ta, Ti, Mo, W, Alor an alloy thereof with a transparent conductive film ofindium-tin-oxide (ITO) or else being laminated on the alloy.
 20. Theactive matrix liquid crystal display device as recited in any one ofclaims 1 to 4 , characterized in that the initial twitt angle of saidliquid crystal layer is substantially zero when applying no electricfields whereas the initial alignment angle is more than or equal to 45degrees and yet less than 90 degrees if the liquid crystal material ispositive in dielectric anisotropy Δε and is beyond 0° degrees and lessthan or equal to 45° degrees if the dielectric anisotropy is negative.21. A method for manufacturing an active matrix liquid crystal displaydevice having a pixel electrode and a counter electrode for causing anelectric field component extending substantially parallel to a substratesurface between said pixel electrode and said counter electrode tocontrol liquid crystal molecules of a liquid crystal layer to therebyperform displaying, characterized by forming at least any one of a scansignal line end section, an image signal line end section or aconductive layer of an uppermost layer of a counter electrode endsection and at least one of a pixel electrode or counter electrode by atransparent conductive layer, and further forming them at the sameprocess step.